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@tomjnixon
Last active November 17, 2021 11:50
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test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
0: c5 fd 66 c1 vpcmpgtd ymm0,ymm0,ymm1
4: c3 ret
5: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
c: 00 00 00 00
0000000000000010 <lt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
10: c5 f5 66 c0 vpcmpgtd ymm0,ymm1,ymm0
14: c3 ret
15: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
1c: 00 00 00 00
0000000000000020 <ge(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
20: c5 f5 66 c0 vpcmpgtd ymm0,ymm1,ymm0
24: c5 f5 76 c9 vpcmpeqd ymm1,ymm1,ymm1
28: c5 fd ef c1 vpxor ymm0,ymm0,ymm1
2c: c3 ret
2d: 0f 1f 00 nop DWORD PTR [rax]
0000000000000030 <le(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
30: c5 fd 66 c1 vpcmpgtd ymm0,ymm0,ymm1
34: c5 f5 76 c9 vpcmpeqd ymm1,ymm1,ymm1
38: c5 fd ef c1 vpxor ymm0,ymm0,ymm1
3c: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
0: c5 fd 66 c1 vpcmpgtd ymm0,ymm0,ymm1
4: c3 ret
5: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
c: 00 00 00 00
0000000000000010 <lt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
10: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
14: c4 e3 7d 39 c0 01 vextracti128 xmm0,ymm0,0x1
1a: c4 e3 7d 39 c9 01 vextracti128 xmm1,ymm1,0x1
20: c5 f1 66 c0 vpcmpgtd xmm0,xmm1,xmm0
24: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
29: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
2e: c4 e3 6d 38 c0 01 vinserti128 ymm0,ymm2,xmm0,0x1
34: c3 ret
35: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
3c: 00 00 00 00
0000000000000040 <ge(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
40: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
44: c5 e1 76 db vpcmpeqd xmm3,xmm3,xmm3
48: c5 e9 ef d3 vpxor xmm2,xmm2,xmm3
4c: c4 e3 7d 39 c0 01 vextracti128 xmm0,ymm0,0x1
52: c4 e3 7d 39 c9 01 vextracti128 xmm1,ymm1,0x1
58: c5 f1 66 c0 vpcmpgtd xmm0,xmm1,xmm0
5c: c5 f9 ef c3 vpxor xmm0,xmm0,xmm3
60: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
65: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
6a: c4 e3 6d 38 c0 01 vinserti128 ymm0,ymm2,xmm0,0x1
70: c3 ret
71: 66 66 66 66 66 66 2e data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
78: 0f 1f 84 00 00 00 00
7f: 00
0000000000000080 <le(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
80: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
84: c4 e3 7d 39 c3 01 vextracti128 xmm3,ymm0,0x1
8a: c4 e3 7d 39 cc 01 vextracti128 xmm4,ymm1,0x1
90: c5 d9 66 db vpcmpgtd xmm3,xmm4,xmm3
94: c5 e1 72 f3 1f vpslld xmm3,xmm3,0x1f
99: c5 e1 72 e3 1f vpsrad xmm3,xmm3,0x1f
9e: c4 e3 6d 38 d3 01 vinserti128 ymm2,ymm2,xmm3,0x1
a4: c5 fd 76 c1 vpcmpeqd ymm0,ymm0,ymm1
a8: c5 fd eb c2 vpor ymm0,ymm0,ymm2
ac: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
0: c5 f9 66 d1 vpcmpgtd xmm2,xmm0,xmm1
4: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
a: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
10: c5 f9 66 c1 vpcmpgtd xmm0,xmm0,xmm1
14: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
19: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
1e: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
24: c3 ret
25: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
2c: 00 00 00 00
0000000000000030 <lt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
30: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
34: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
3a: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
40: c5 f1 66 c0 vpcmpgtd xmm0,xmm1,xmm0
44: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
49: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
4e: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
54: c3 ret
55: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
5c: 00 00 00 00
0000000000000060 <ge(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
60: c5 f9 66 d1 vpcmpgtd xmm2,xmm0,xmm1
64: c4 e3 7d 19 cb 01 vextractf128 xmm3,ymm1,0x1
6a: c4 e3 7d 19 c4 01 vextractf128 xmm4,ymm0,0x1
70: c5 d9 66 eb vpcmpgtd xmm5,xmm4,xmm3
74: c5 d1 72 f5 1f vpslld xmm5,xmm5,0x1f
79: c5 d1 72 e5 1f vpsrad xmm5,xmm5,0x1f
7e: c4 e3 6d 18 d5 01 vinsertf128 ymm2,ymm2,xmm5,0x1
84: c5 f1 76 c0 vpcmpeqd xmm0,xmm1,xmm0
88: c5 e1 76 cc vpcmpeqd xmm1,xmm3,xmm4
8c: c5 f1 72 f1 1f vpslld xmm1,xmm1,0x1f
91: c5 f1 72 e1 1f vpsrad xmm1,xmm1,0x1f
96: c4 e3 7d 18 c1 01 vinsertf128 ymm0,ymm0,xmm1,0x1
9c: c5 fc 56 c2 vorps ymm0,ymm0,ymm2
a0: c3 ret
a1: 66 66 66 66 66 66 2e data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
a8: 0f 1f 84 00 00 00 00
af: 00
00000000000000b0 <le(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
b0: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
b4: c4 e3 7d 19 c3 01 vextractf128 xmm3,ymm0,0x1
ba: c4 e3 7d 19 cc 01 vextractf128 xmm4,ymm1,0x1
c0: c5 d9 66 eb vpcmpgtd xmm5,xmm4,xmm3
c4: c5 d1 72 f5 1f vpslld xmm5,xmm5,0x1f
c9: c5 d1 72 e5 1f vpsrad xmm5,xmm5,0x1f
ce: c4 e3 6d 18 d5 01 vinsertf128 ymm2,ymm2,xmm5,0x1
d4: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
d8: c5 e1 76 cc vpcmpeqd xmm1,xmm3,xmm4
dc: c5 f1 72 f1 1f vpslld xmm1,xmm1,0x1f
e1: c5 f1 72 e1 1f vpsrad xmm1,xmm1,0x1f
e6: c4 e3 7d 18 c1 01 vinsertf128 ymm0,ymm0,xmm1,0x1
ec: c5 fc 56 c2 vorps ymm0,ymm0,ymm2
f0: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
0: c5 f9 66 d1 vpcmpgtd xmm2,xmm0,xmm1
4: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
a: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
10: c5 f9 66 c1 vpcmpgtd xmm0,xmm0,xmm1
14: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
19: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
1e: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
24: c3 ret
25: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
2c: 00 00 00 00
0000000000000030 <lt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
30: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
34: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
3a: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
40: c5 f1 66 c0 vpcmpgtd xmm0,xmm1,xmm0
44: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
49: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
4e: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
54: c3 ret
55: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
5c: 00 00 00 00
0000000000000060 <ge(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
60: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
64: c5 e1 76 db vpcmpeqd xmm3,xmm3,xmm3
68: c5 e9 ef d3 vpxor xmm2,xmm2,xmm3
6c: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
72: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
78: c5 f1 66 c0 vpcmpgtd xmm0,xmm1,xmm0
7c: c5 f9 ef c3 vpxor xmm0,xmm0,xmm3
80: c5 f9 72 f0 1f vpslld xmm0,xmm0,0x1f
85: c5 f9 72 e0 1f vpsrad xmm0,xmm0,0x1f
8a: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
90: c3 ret
91: 66 66 66 66 66 66 2e data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
98: 0f 1f 84 00 00 00 00
9f: 00
00000000000000a0 <le(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
a0: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
a4: c4 e3 7d 19 c3 01 vextractf128 xmm3,ymm0,0x1
aa: c4 e3 7d 19 cc 01 vextractf128 xmm4,ymm1,0x1
b0: c5 d9 66 eb vpcmpgtd xmm5,xmm4,xmm3
b4: c5 d1 72 f5 1f vpslld xmm5,xmm5,0x1f
b9: c5 d1 72 e5 1f vpsrad xmm5,xmm5,0x1f
be: c4 e3 6d 18 d5 01 vinsertf128 ymm2,ymm2,xmm5,0x1
c4: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
c8: c5 e1 76 cc vpcmpeqd xmm1,xmm3,xmm4
cc: c5 f1 72 f1 1f vpslld xmm1,xmm1,0x1f
d1: c5 f1 72 e1 1f vpsrad xmm1,xmm1,0x1f
d6: c4 e3 7d 18 c1 01 vinsertf128 ymm0,ymm0,xmm1,0x1
dc: c5 fc 56 c2 vorps ymm0,ymm0,ymm2
e0: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
0: c5 fd 66 c1 vpcmpgtd ymm0,ymm0,ymm1
4: c3 ret
5: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
c: 00 00 00 00
0000000000000010 <lt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
10: c5 f5 66 c0 vpcmpgtd ymm0,ymm1,ymm0
14: c3 ret
15: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
1c: 00 00 00 00
0000000000000020 <ge(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
20: c5 fd 66 d1 vpcmpgtd ymm2,ymm0,ymm1
24: c5 fd 76 c1 vpcmpeqd ymm0,ymm0,ymm1
28: c5 ed eb c0 vpor ymm0,ymm2,ymm0
2c: c3 ret
2d: 0f 1f 00 nop DWORD PTR [rax]
0000000000000030 <le(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
30: c5 f5 66 d0 vpcmpgtd ymm2,ymm1,ymm0
34: c5 f5 76 c8 vpcmpeqd ymm1,ymm1,ymm0
38: c5 ed eb c1 vpor ymm0,ymm2,ymm1
3c: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
0: c5 fd 66 c1 vpcmpgtd ymm0,ymm0,ymm1
4: c3 ret
5: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
c: 00 00 00 00
0000000000000010 <lt(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
10: c5 f9 6f d8 vmovdqa xmm3,xmm0
14: c5 f9 6f d1 vmovdqa xmm2,xmm1
18: c4 e3 7d 39 c0 01 vextracti128 xmm0,ymm0,0x1
1e: c4 e3 7d 39 c9 01 vextracti128 xmm1,ymm1,0x1
24: c5 e9 66 d3 vpcmpgtd xmm2,xmm2,xmm3
28: c5 f1 66 c8 vpcmpgtd xmm1,xmm1,xmm0
2c: c4 e3 6d 38 c1 01 vinserti128 ymm0,ymm2,xmm1,0x1
32: c3 ret
33: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
3a: 00 00 00 00
3e: 66 90 xchg ax,ax
0000000000000040 <ge(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
40: c5 f9 6f e1 vmovdqa xmm4,xmm1
44: c5 f9 6f d8 vmovdqa xmm3,xmm0
48: c4 e3 7d 39 c9 01 vextracti128 xmm1,ymm1,0x1
4e: c5 e1 66 d4 vpcmpgtd xmm2,xmm3,xmm4
52: c5 e1 76 dc vpcmpeqd xmm3,xmm3,xmm4
56: c4 e3 7d 39 c0 01 vextracti128 xmm0,ymm0,0x1
5c: c5 e9 eb d3 vpor xmm2,xmm2,xmm3
60: c5 f9 66 d9 vpcmpgtd xmm3,xmm0,xmm1
64: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
68: c5 e1 eb c0 vpor xmm0,xmm3,xmm0
6c: c4 e3 6d 38 c0 01 vinserti128 ymm0,ymm2,xmm0,0x1
72: c3 ret
73: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
7a: 00 00 00 00
7e: 66 90 xchg ax,ax
0000000000000080 <le(xsimd::batch<int, xsimd::fma5>, xsimd::batch<int, xsimd::fma5>)>:
80: c4 e3 7d 39 c4 01 vextracti128 xmm4,ymm0,0x1
86: c5 f1 66 d0 vpcmpgtd xmm2,xmm1,xmm0
8a: c4 e3 7d 39 cb 01 vextracti128 xmm3,ymm1,0x1
90: c5 e1 66 dc vpcmpgtd xmm3,xmm3,xmm4
94: c5 fd 76 c1 vpcmpeqd ymm0,ymm0,ymm1
98: c4 e3 6d 38 d3 01 vinserti128 ymm2,ymm2,xmm3,0x1
9e: c5 fd eb c2 vpor ymm0,ymm0,ymm2
a2: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
0: c5 f9 6f d9 vmovdqa xmm3,xmm1
4: c5 f9 6f d0 vmovdqa xmm2,xmm0
8: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
e: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
14: c5 e9 66 d3 vpcmpgtd xmm2,xmm2,xmm3
18: c5 f9 66 c1 vpcmpgtd xmm0,xmm0,xmm1
1c: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
22: c3 ret
23: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
2a: 00 00 00 00
2e: 66 90 xchg ax,ax
0000000000000030 <lt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
30: c5 f9 6f d8 vmovdqa xmm3,xmm0
34: c5 f9 6f d1 vmovdqa xmm2,xmm1
38: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
3e: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
44: c5 e9 66 d3 vpcmpgtd xmm2,xmm2,xmm3
48: c5 f1 66 c8 vpcmpgtd xmm1,xmm1,xmm0
4c: c4 e3 6d 18 c1 01 vinsertf128 ymm0,ymm2,xmm1,0x1
52: c3 ret
53: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
5a: 00 00 00 00
5e: 66 90 xchg ax,ax
0000000000000060 <ge(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
60: c5 f9 6f e8 vmovdqa xmm5,xmm0
64: c5 f9 6f d9 vmovdqa xmm3,xmm1
68: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
6e: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
74: c5 d1 66 d3 vpcmpgtd xmm2,xmm5,xmm3
78: c5 f9 66 e1 vpcmpgtd xmm4,xmm0,xmm1
7c: c5 e1 76 dd vpcmpeqd xmm3,xmm3,xmm5
80: c5 f1 76 c8 vpcmpeqd xmm1,xmm1,xmm0
84: c5 e9 eb c3 vpor xmm0,xmm2,xmm3
88: c5 d9 eb c9 vpor xmm1,xmm4,xmm1
8c: c4 e3 7d 18 c1 01 vinsertf128 ymm0,ymm0,xmm1,0x1
92: c3 ret
93: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
9a: 00 00 00 00
9e: 66 90 xchg ax,ax
00000000000000a0 <le(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
a0: c5 f9 6f e9 vmovdqa xmm5,xmm1
a4: c5 f9 6f d8 vmovdqa xmm3,xmm0
a8: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
ae: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
b4: c5 d1 66 d3 vpcmpgtd xmm2,xmm5,xmm3
b8: c5 f1 66 e0 vpcmpgtd xmm4,xmm1,xmm0
bc: c5 e1 76 dd vpcmpeqd xmm3,xmm3,xmm5
c0: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
c4: c5 e9 eb cb vpor xmm1,xmm2,xmm3
c8: c5 d9 eb c0 vpor xmm0,xmm4,xmm0
cc: c4 e3 75 18 c0 01 vinsertf128 ymm0,ymm1,xmm0,0x1
d2: c3 ret
test_compare.o: file format elf64-x86-64
Disassembly of section .text:
0000000000000000 <gt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
0: c5 f9 6f d9 vmovdqa xmm3,xmm1
4: c5 f9 6f d0 vmovdqa xmm2,xmm0
8: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
e: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
14: c5 e9 66 d3 vpcmpgtd xmm2,xmm2,xmm3
18: c5 f9 66 c1 vpcmpgtd xmm0,xmm0,xmm1
1c: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
22: c3 ret
23: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
2a: 00 00 00 00
2e: 66 90 xchg ax,ax
0000000000000030 <lt(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
30: c5 f9 6f d8 vmovdqa xmm3,xmm0
34: c5 f9 6f d1 vmovdqa xmm2,xmm1
38: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
3e: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
44: c5 e9 66 d3 vpcmpgtd xmm2,xmm2,xmm3
48: c5 f1 66 c8 vpcmpgtd xmm1,xmm1,xmm0
4c: c4 e3 6d 18 c1 01 vinsertf128 ymm0,ymm2,xmm1,0x1
52: c3 ret
53: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
5a: 00 00 00 00
5e: 66 90 xchg ax,ax
0000000000000060 <ge(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
60: c5 f9 6f e1 vmovdqa xmm4,xmm1
64: c5 f9 6f d8 vmovdqa xmm3,xmm0
68: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
6e: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
74: c5 e1 66 d4 vpcmpgtd xmm2,xmm3,xmm4
78: c5 e1 76 dc vpcmpeqd xmm3,xmm3,xmm4
7c: c5 e9 eb d3 vpor xmm2,xmm2,xmm3
80: c5 f9 66 d9 vpcmpgtd xmm3,xmm0,xmm1
84: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
88: c5 e1 eb c0 vpor xmm0,xmm3,xmm0
8c: c4 e3 6d 18 c0 01 vinsertf128 ymm0,ymm2,xmm0,0x1
92: c3 ret
93: 66 66 2e 0f 1f 84 00 data16 nop WORD PTR cs:[rax+rax*1+0x0]
9a: 00 00 00 00
9e: 66 90 xchg ax,ax
00000000000000a0 <le(xsimd::batch<int, xsimd::avx>, xsimd::batch<int, xsimd::avx>)>:
a0: c5 f9 6f e9 vmovdqa xmm5,xmm1
a4: c5 f9 6f d8 vmovdqa xmm3,xmm0
a8: c4 e3 7d 19 c9 01 vextractf128 xmm1,ymm1,0x1
ae: c4 e3 7d 19 c0 01 vextractf128 xmm0,ymm0,0x1
b4: c5 d1 66 d3 vpcmpgtd xmm2,xmm5,xmm3
b8: c5 f1 66 e0 vpcmpgtd xmm4,xmm1,xmm0
bc: c5 e1 76 dd vpcmpeqd xmm3,xmm3,xmm5
c0: c5 f9 76 c1 vpcmpeqd xmm0,xmm0,xmm1
c4: c5 e9 eb cb vpor xmm1,xmm2,xmm3
c8: c5 d9 eb c0 vpor xmm0,xmm4,xmm0
cc: c4 e3 75 18 c0 01 vinsertf128 ymm0,ymm1,xmm0,0x1
d2: c3 ret
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