Created
December 13, 2016 02:49
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P6_NOP patch
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diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu | |
index a4bb92600b0a..e753d31e7fb4 100644 | |
--- a/arch/x86/Kconfig.cpu | |
+++ b/arch/x86/Kconfig.cpu | |
@@ -319,6 +319,7 @@ config MPSC | |
config MATOM | |
bool "Intel Atom" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for the Intel Atom platform. Intel Atom CPUs have an | |
@@ -328,6 +329,7 @@ config MATOM | |
config MCORE2 | |
bool "Intel Core 2" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and | |
@@ -339,6 +341,7 @@ config MCORE2 | |
config MNEHALEM | |
bool "Intel Nehalem" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 1st Gen Core processors in the Nehalem family. | |
@@ -347,6 +350,7 @@ config MNEHALEM | |
config MWESTMERE | |
bool "Intel Westmere" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for the Intel Westmere formerly Nehalem-C family. | |
@@ -355,6 +359,7 @@ config MWESTMERE | |
config MSILVERMONT | |
bool "Intel Silvermont" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for the Intel Silvermont platform. | |
@@ -363,6 +368,7 @@ config MSILVERMONT | |
config MSANDYBRIDGE | |
bool "Intel Sandy Bridge" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 2nd Gen Core processors in the Sandy Bridge family. | |
@@ -371,6 +377,7 @@ config MSANDYBRIDGE | |
config MIVYBRIDGE | |
bool "Intel Ivy Bridge" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 3rd Gen Core processors in the Ivy Bridge family. | |
@@ -379,6 +386,7 @@ config MIVYBRIDGE | |
config MHASWELL | |
bool "Intel Haswell" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 4th Gen Core processors in the Haswell family. | |
@@ -387,6 +395,7 @@ config MHASWELL | |
config MBROADWELL | |
bool "Intel Broadwell" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 5th Gen Core processors in the Broadwell family. | |
@@ -395,6 +404,7 @@ config MBROADWELL | |
config MSKYLAKE | |
bool "Intel Skylake" | |
+ select X86_P6_NOP | |
---help--- | |
Select this for 6th Gen Core processors in the Skylake family. | |
@@ -486,21 +496,23 @@ config X86_USE_3DNOW | |
def_bool y | |
depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML | |
-# | |
-# P6_NOPs are a relatively minor optimization that require a family >= | |
-# 6 processor, except that it is broken on certain VIA chips. | |
-# Furthermore, AMD chips prefer a totally different sequence of NOPs | |
-# (which work on all CPUs). In addition, it looks like Virtual PC | |
-# does not understand them. | |
-# | |
-# As a result, disallow these if we're not compiling for X86_64 (these | |
-# NOPs do work on all x86-64 capable chips); the list of processors in | |
-# the right-hand clause are the cores that benefit from this optimization. | |
-# | |
config X86_P6_NOP | |
- def_bool y | |
+ default n | |
+ bool "Support for P6_NOPs on Intel chips" | |
depends on X86_64 | |
- depends on (MCORE2 || MPENTIUM4 || MPSC || MNATIVE) | |
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MNATIVE) | |
+ ---help--- | |
+ P6_NOPs are a relatively minor optimization that require a family >= | |
+ 6 processor, except that it is broken on certain VIA chips. | |
+ Furthermore, AMD chips prefer a totally different sequence of NOPs | |
+ (which work on all CPUs). In addition, it looks like Virtual PC | |
+ does not understand them. | |
+ | |
+ As a result, disallow these if we're not compiling for X86_64 (these | |
+ NOPs do work on all x86-64 capable chips); the list of processors in | |
+ the right-hand clause are the cores that benefit from this optimization. | |
+ | |
+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise. | |
config X86_TSC | |
def_bool y |
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