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@tritao
Created May 14, 2020 21:59
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NuttX F7 QSPI patches
From 8217059476dc5f23be155d6021427ba3000620cc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joa=CC=83o=20Matos?= <[email protected]>
Date: Thu, 9 May 2019 15:22:25 +0100
Subject: [PATCH] Do not wait for transfer complete flag for non-data commands
in STM32 F7 QSPI.
---
arch/arm/src/stm32f7/stm32_qspi.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/src/stm32f7/stm32_qspi.c b/arch/arm/src/stm32f7/stm32_qspi.c
index 63ababa134..b9a8cc270a 100644
--- a/arch/arm/src/stm32f7/stm32_qspi.c
+++ b/arch/arm/src/stm32f7/stm32_qspi.c
@@ -2100,15 +2100,16 @@ static int qspi_command(struct qspi_dev_s *dev,
}
MEMORY_SYNC();
+
+ /* Wait for Transfer complete */
+ qspi_waitstatusflags(priv, QSPI_SR_TCF, 1);
}
else
{
ret = OK;
}
- /* Wait for Transfer complete, and not busy */
-
- qspi_waitstatusflags(priv, QSPI_SR_TCF, 1);
+ /* Wait for not busy */
qspi_waitstatusflags(priv, QSPI_SR_BUSY, 0);
#endif
From 94df5d863aa6be6e761ea8c0e411a719fc2e1ab8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joa=CC=83o=20Matos?= <[email protected]>
Date: Wed, 29 May 2019 19:18:35 +0100
Subject: [PATCH] Do not check memory alignment for QSPI memory buffers in
polling mode.
As far as I can tell, this is only necessary with DMA and causes asserts when dealing with SMART FS wear leveling buffer.
---
arch/arm/src/stm32f7/stm32_qspi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/src/stm32f7/stm32_qspi.c b/arch/arm/src/stm32f7/stm32_qspi.c
index b9a8cc270a..48793e8f87 100644
--- a/arch/arm/src/stm32f7/stm32_qspi.c
+++ b/arch/arm/src/stm32f7/stm32_qspi.c
@@ -2285,7 +2285,6 @@ static int qspi_memory(struct qspi_dev_s *dev,
/* Transfer data */
DEBUGASSERT(meminfo->buffer != NULL && meminfo->buflen > 0);
- DEBUGASSERT(IS_ALIGNED(meminfo->buffer));
if (QSPIMEM_ISWRITE(meminfo->flags))
{
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