Read stm32 firmware binary with openOCD

read-stm32-firmware.md

read-stm32-firmware

OpenOCD scripts for read STM32 firmware binary

Requirements

Linux

OpenOCD (Open On-Chip Debugger) is open-source software that interfaces with a hardware debugger's JTAG port. OpenOCD provides debugging and in-system programming for embedded target devices. OpenOCD provides the ability to flash NAND and NOR FLASH memory devices that are attached to the processor on the target system. Flash programming is supported for external CFI compatible flashes (Intel and AMD/Spansion command set) and several internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and STM32x).

OpenOCD was originally developed by Dominic Rath at the University of Applied Sciences Augsburg. The OpenOCD source code is now available through the GNU General Public License (GPL).

Under ubuntu 20.04 just install with this:

sudo apt-get install openocd

Under Arch/Manjaro:

sudo pacman -S openocd

Win32

Here is the locaiton prebuild binary can be downloaded from: https://gnutoolchains.com/arm-eabi/openocd/

OPENOCD Command

Read command example

For STM32f103c8 with 64Kbytes Flash. Target is target/stm32f1x.cfg. Size to read is 0x10000. Read firmware as firmwareF1.bin.

openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash read_bank 0 firmwareF1.bin 0 0x10000" -c "reset" -c shutdown

For STM32f407vg with 1Mbytes Flash. Target is target/stm32f4x.cfg. Size to read is 0x100000. Read firmware as firmwareF4.bin.

openocd -f interface/stlink-v2.cfg -f target/stm32f4x.cfg -c init -c "reset halt" -c "flash read_bank 0 firmwareF4.bin 0 0x100000" -c "reset" -c shutdown

Write command example

For STM32f103c8 with 64Kbytes Flash. Target is target/stm32f1x.cfg. Write firmware firmwareF1.bin to flash.

openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash write_image erase firmwareF1.bin 0x08000000" -c "reset" -c shutdown

For STM32f407vg with 1Mbytes Flash. Target is target/stm32f4x.cfg. Write firmware firmwareF4.bin to flash.

openocd -f interface/stlink-v2.cfg -f target/stm32f4x.cfg -c init -c "reset halt" -c "flash write_image erase firmwareF4.bin 0x08000000" -c "reset" -c shutdown

It worked to me. Thanks for post these commands.

Below what I did with details.

Apps

Installing openocd on 18.04.1-Ubuntu SMP x86_64 x86_64 x86_64 GNU/Linux

$ sudo apt-get install openocd
[sudo] password for myusername: 
Reading package lists... Done
Building dependency tree       
Reading state information... Done
The following additional packages will be installed:
  libhidapi-hidraw0 libjaylink0 libjim0.77
The following NEW packages will be installed:
  libhidapi-hidraw0 libjaylink0 libjim0.77 openocd
0 upgraded, 4 newly installed, 0 to remove and 2 not upgraded.
Need to get 2.259 kB of archives.
After this operation, 6.329 kB of additional disk space will be used.
Do you want to continue? [Y/n] Y
Get:1 http://us.archive.ubuntu.com/ubuntu bionic/universe amd64 libjaylink0 amd64 0.1.0-1 [17,0 kB]
Get:2 http://us.archive.ubuntu.com/ubuntu bionic/universe amd64 libhidapi-hidraw0 amd64 0.8.0~rc1+git20140818.d17db57+dfsg-2 [10,4 kB]
Get:3 http://us.archive.ubuntu.com/ubuntu bionic/universe amd64 libjim0.77 amd64 0.77+dfsg0-2 [115 kB]
Get:4 http://us.archive.ubuntu.com/ubuntu bionic/universe amd64 openocd amd64 0.10.0-4 [2.117 kB]
Fetched 2.259 kB in 2s (1.411 kB/s)  
Selecting previously unselected package libjaylink0.
(Reading database ... 354849 files and directories currently installed.)
Preparing to unpack .../libjaylink0_0.1.0-1_amd64.deb ...
Unpacking libjaylink0 (0.1.0-1) ...
Selecting previously unselected package libhidapi-hidraw0:amd64.
Preparing to unpack .../libhidapi-hidraw0_0.8.0~rc1+git20140818.d17db57+dfsg-2_amd64.deb ...
Unpacking libhidapi-hidraw0:amd64 (0.8.0~rc1+git20140818.d17db57+dfsg-2) ...
Selecting previously unselected package libjim0.77:amd64.
Preparing to unpack .../libjim0.77_0.77+dfsg0-2_amd64.deb ...
Unpacking libjim0.77:amd64 (0.77+dfsg0-2) ...
Selecting previously unselected package openocd.
Preparing to unpack .../openocd_0.10.0-4_amd64.deb ...
Unpacking openocd (0.10.0-4) ...
Setting up libjaylink0 (0.1.0-1) ...
Setting up libhidapi-hidraw0:amd64 (0.8.0~rc1+git20140818.d17db57+dfsg-2) ...
Setting up libjim0.77:amd64 (0.77+dfsg0-2) ...
Setting up openocd (0.10.0-4) ...
Processing triggers for install-info (6.5.0.dfsg.1-2) ...
Processing triggers for libc-bin (2.27-3ubuntu1.6) ...
/sbin/ldconfig.real: /lib32/libstlink.so.1 is not a symbolic link

Processing triggers for man-db (2.8.3-2ubuntu0.1) ...

Running the provided command

$ openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash read_bank 0 firmwareF1.bin 0 0x10000" -c "reset" -c shutdown
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v29 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.236027
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x1ffff020 msp: 0x200001fc
Info : device id = 0x20036410
Info : flash size = 64kbytes
wrote 65536 bytes to file firmwareF1.bin from flash bank 0 at offset 0x00000000 in 1.011339s (63.282 KiB/s)
shutdown command invoked

$ echo $?
0

Result

After the command is executed with success, the firmware is found in the file firmwareF1.bin

$ l
  907 64 -rw-rw-r-- 1 1000 1000 1000 ? 65536 2024-09-10 03:22:50.554872975 -0300 firmwareF1.bin
$ md5sum firmwareF1.bin
d2597bb77f754b0cf25ebbba75c89bfc  firmwareF1.bin

The extracted firmware file is zipped and base64 to be posted below

UEsDBBQAAAAIANkaKllhsS0MEgkAAAAAAQAOABwAZmlybXdhcmVGMS5iaW5VVAkAA7rl32Yn5t9m
dXgLAAEE6AMAAAToAwAA7dd9bBPnHQfw5+78cnYMvoSUhhKWcxyo0wpIeBNDXbn4Er8GwtukiqLJ
oV3l0E27bOqEKKtMWLVUAy2lk8bQNtFt2qStawlb2KjIkrTrmmorjcsfVLyoh6aKLFWlCxhinBDv
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LhFmXaaYQH0vUmzlv60WMcLPIlPt8/nwy3lp2Gf5naVa8Z2bZH5p7OW8ONw+4aQoG+aR5rHqNFMf
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AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAD+Z/4D
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YmluVVQFAAO65d9mdXgLAAEE6AMAAAToAwAAUEsFBgAAAAABAAEAVAAAAFoJAAAAAA==

Hardware

Interface and board connections

ST-LINK V2 |  STM32F103C8T6(Board Header Pins)
[2] SWDIO  |  DIO
[4] GND    |  GND
[6] SWCLK  |  DCLK
[8] 3.3V   |  3.3

Interface: ST-LINK V2

Board with STM32F103C8T6

Here is the full output with debug level 3

$ openocd -d 3 -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash read_bank 0 firmwareF1_.bin 0 0x10000" -c "reset" -c shutdown
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 13 3 command.c:544 command_print(): debug_level: 3
Debug: 14 3 options.c:181 add_default_dirs(): bindir=/usr/bin
Debug: 15 3 options.c:182 add_default_dirs(): pkgdatadir=/usr/share/openocd
Debug: 16 3 options.c:183 add_default_dirs(): exepath=/usr/bin
Debug: 17 3 options.c:184 add_default_dirs(): bin2data=../share/openocd
Debug: 18 3 configuration.c:42 add_script_search_dir(): adding /home/gpsr/.openocd
Debug: 19 3 configuration.c:42 add_script_search_dir(): adding /usr/bin/../share/openocd/site
Debug: 20 3 configuration.c:42 add_script_search_dir(): adding /usr/bin/../share/openocd/scripts
Debug: 21 3 configuration.c:82 find_file(): found /usr/bin/../share/openocd/scripts/interface/stlink-v2.cfg
Debug: 22 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 3 command.c:143 script_debug(): command - interface ocd_interface hla
Debug: 25 3 command.c:364 register_command_handler(): registering 'ocd_hla_device_desc'...
Debug: 26 3 command.c:364 register_command_handler(): registering 'ocd_hla_serial'...
Debug: 27 3 command.c:364 register_command_handler(): registering 'ocd_hla_layout'...
Debug: 28 3 command.c:364 register_command_handler(): registering 'ocd_hla_vid_pid'...
Debug: 29 3 command.c:364 register_command_handler(): registering 'ocd_hla_command'...
Debug: 30 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
Debug: 31 3 command.c:143 script_debug(): command - hla_layout ocd_hla_layout stlink
Debug: 33 3 hla_interface.c:239 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
Debug: 35 3 command.c:143 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
Debug: 37 3 hla_interface.c:213 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
Debug: 39 3 command.c:143 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
Debug: 41 3 hla_interface.c:267 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
Debug: 42 3 configuration.c:82 find_file(): found /usr/bin/../share/openocd/scripts/target/stm32f1x.cfg
Debug: 43 3 configuration.c:82 find_file(): found /usr/bin/../share/openocd/scripts/target/swj-dp.tcl
Debug: 44 3 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 45 3 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Info : 46 4 transport.c:286 jim_transport_select(): auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Debug: 47 4 hla_transport.c:191 hl_transport_select(): hl_transport_select
Debug: 48 4 command.c:364 register_command_handler(): registering 'ocd_hla'...
Debug: 49 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 51 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 52 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 53 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 54 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 55 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 56 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 57 4 command.c:364 register_command_handler(): registering 'ocd_jtag'...
Debug: 58 4 command.c:364 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
Debug: 59 4 configuration.c:82 find_file(): found /usr/bin/../share/openocd/scripts/mem_helper.tcl
Debug: 60 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
Debug: 61 4 command.c:143 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
Debug: 63 4 command.c:1098 help_add_command(): added 'mrw' help text
Debug: 64 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
Debug: 65 4 command.c:143 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
Debug: 67 4 command.c:1111 help_add_command(): added 'mrw' help text
Debug: 68 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrb address
Debug: 69 4 command.c:143 script_debug(): command - add_usage_text ocd_add_usage_text mrb address
Debug: 71 4 command.c:1098 help_add_command(): added 'mrb' help text
Debug: 72 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrb Returns value of byte in memory.
Debug: 73 4 command.c:143 script_debug(): command - add_help_text ocd_add_help_text mrb Returns value of byte in memory.
Debug: 75 4 command.c:1111 help_add_command(): added 'mrb' help text
Debug: 76 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
Debug: 77 4 command.c:143 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
Debug: 79 4 command.c:1098 help_add_command(): added 'mmw' help text
Debug: 80 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 81 4 command.c:143 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 83 4 command.c:1111 help_add_command(): added 'mmw' help text
Debug: 84 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 85 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 86 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 87 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 88 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 89 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 90 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 91 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 92 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm32f1x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 93 4 command.c:143 script_debug(): command - ocd_hla ocd_hla newtap stm32f1x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 94 4 hla_tcl.c:116 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32f1x, Tap: cpu, Dotted: stm32f1x.cpu, 8 params
Debug: 95 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -irlen
Debug: 96 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -ircapture
Debug: 97 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -irmask
Debug: 98 4 hla_tcl.c:126 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 99 4 core.c:1304 jtag_tap_init(): Created Tap: stm32f1x.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 100 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 101 4 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 102 4 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target create stm32f1x.cpu cortex_m -endian little -chain-position stm32f1x.cpu
Debug: 103 4 command.c:143 script_debug(): command - ocd_target ocd_target create stm32f1x.cpu cortex_m -endian little -chain-position stm32f1x.cpu
Info : 104 4 target.c:5340 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Debug: 105 4 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 106 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 107 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 108 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 109 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 110 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 111 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 112 4 command.c:364 register_command_handler(): registering 'ocd_arm'...
Debug: 113 4 command.c:364 register_command_handler(): registering 'ocd_tpiu'...
Debug: 114 4 command.c:364 register_command_handler(): registering 'ocd_itm'...
Debug: 115 4 command.c:364 register_command_handler(): registering 'ocd_itm'...
Debug: 116 4 hla_target.c:351 adapter_target_create(): adapter_target_create
Debug: 117 4 hla_target.c:322 adapter_init_arch_info(): adapter_init_arch_info
Debug: 118 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 119 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 120 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 121 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 122 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 123 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 124 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 125 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 126 4 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 127 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 128 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 129 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 130 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 131 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 132 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 133 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 134 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 135 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 136 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 137 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 138 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 139 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 140 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 141 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 142 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 143 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 144 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 145 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 146 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 147 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 148 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 149 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 150 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 151 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x.cpu'...
Debug: 152 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
Debug: 153 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
Debug: 154 5 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 155 5 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 156 5 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 157 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32f1x.flash stm32f1x 0x08000000 0 0 0 stm32f1x.cpu
Debug: 158 5 command.c:143 script_debug(): command - ocd_flash ocd_flash bank stm32f1x.flash stm32f1x 0x08000000 0 0 0 stm32f1x.cpu
Debug: 160 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 161 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 162 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 163 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 164 5 command.c:364 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 165 5 tcl.c:1033 handle_flash_bank_command(): 'stm32f1x' driver usage field missing
Debug: 166 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
Debug: 167 5 command.c:143 script_debug(): command - adapter_khz ocd_adapter_khz 1000
Debug: 169 5 core.c:1631 jtag_config_khz(): handle jtag khz
Debug: 170 5 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 171 5 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 172 5 command.c:544 command_print(): adapter speed: 1000 kHz
Debug: 173 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
Debug: 174 5 command.c:143 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
User : 176 5 command.c:544 command_print(): adapter_nsrst_delay: 100
Debug: 177 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 178 5 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 179 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_nogate
Debug: 180 5 command.c:143 script_debug(): command - reset_config ocd_reset_config srst_nogate
User : 182 5 command.c:544 command_print(): none separate
Debug: 183 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 184 5 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 185 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event examine-end 
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0

Debug: 186 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event examine-end 
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0

Debug: 187 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event trace-config 
	# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
	# change this value accordingly to configure trace pins
	# assignment
	mmw 0xE0042004 0x00000020 0

Debug: 188 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event trace-config 
	# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
	# change this value accordingly to configure trace pins
	# assignment
	mmw 0xE0042004 0x00000020 0

Debug: 189 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 190 5 command.c:143 script_debug(): command - init ocd_init
Debug: 192 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 193 5 command.c:143 script_debug(): command - ocd_target ocd_target init
Debug: 195 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 196 5 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 197 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu cget -event gdb-flash-erase-start
Debug: 198 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu cget -event gdb-flash-erase-start
Debug: 199 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event gdb-flash-erase-start reset init
Debug: 200 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event gdb-flash-erase-start reset init
Debug: 201 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu cget -event gdb-flash-write-end
Debug: 202 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu cget -event gdb-flash-write-end
Debug: 203 5 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event gdb-flash-write-end reset halt
Debug: 204 5 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event gdb-flash-write-end reset halt
Debug: 205 5 target.c:1324 handle_target_init_command(): Initializing targets...
Debug: 206 5 hla_target.c:341 adapter_init_target(): adapter_init_target
Debug: 207 5 command.c:364 register_command_handler(): registering 'ocd_target_request'...
Debug: 208 5 command.c:364 register_command_handler(): registering 'ocd_trace'...
Debug: 209 5 command.c:364 register_command_handler(): registering 'ocd_trace'...
Debug: 210 5 command.c:364 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 211 6 command.c:364 register_command_handler(): registering 'ocd_fast_load'...
Debug: 212 6 command.c:364 register_command_handler(): registering 'ocd_profile'...
Debug: 213 6 command.c:364 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 214 6 command.c:364 register_command_handler(): registering 'ocd_reg'...
Debug: 215 6 command.c:364 register_command_handler(): registering 'ocd_poll'...
Debug: 216 6 command.c:364 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 217 6 command.c:364 register_command_handler(): registering 'ocd_halt'...
Debug: 218 6 command.c:364 register_command_handler(): registering 'ocd_resume'...
Debug: 219 6 command.c:364 register_command_handler(): registering 'ocd_reset'...
Debug: 220 6 command.c:364 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 221 6 command.c:364 register_command_handler(): registering 'ocd_step'...
Debug: 222 6 command.c:364 register_command_handler(): registering 'ocd_mdw'...
Debug: 223 6 command.c:364 register_command_handler(): registering 'ocd_mdh'...
Debug: 224 6 command.c:364 register_command_handler(): registering 'ocd_mdb'...
Debug: 225 6 command.c:364 register_command_handler(): registering 'ocd_mww'...
Debug: 226 6 command.c:364 register_command_handler(): registering 'ocd_mwh'...
Debug: 227 6 command.c:364 register_command_handler(): registering 'ocd_mwb'...
Debug: 228 6 command.c:364 register_command_handler(): registering 'ocd_bp'...
Debug: 229 6 command.c:364 register_command_handler(): registering 'ocd_rbp'...
Debug: 230 6 command.c:364 register_command_handler(): registering 'ocd_wp'...
Debug: 231 6 command.c:364 register_command_handler(): registering 'ocd_rwp'...
Debug: 232 6 command.c:364 register_command_handler(): registering 'ocd_load_image'...
Debug: 233 6 command.c:364 register_command_handler(): registering 'ocd_dump_image'...
Debug: 234 6 command.c:364 register_command_handler(): registering 'ocd_verify_image_checksum'...
Debug: 235 6 command.c:364 register_command_handler(): registering 'ocd_verify_image'...
Debug: 236 6 command.c:364 register_command_handler(): registering 'ocd_test_image'...
Debug: 237 6 command.c:364 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 238 6 command.c:364 register_command_handler(): registering 'ocd_ps'...
Debug: 239 6 command.c:364 register_command_handler(): registering 'ocd_test_mem_access'...
Debug: 240 6 hla_interface.c:109 hl_interface_init(): hl_interface_init
Debug: 241 6 hla_layout.c:83 hl_layout_init(): hl_layout_init
Debug: 242 6 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 243 6 core.c:1601 adapter_khz_to_speed(): have interface set up
Info : 244 6 stlink_usb.c:1608 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
Debug: 245 6 core.c:1598 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 246 6 core.c:1601 adapter_khz_to_speed(): have interface set up
Info : 247 6 stlink_usb.c:1608 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
Info : 248 6 core.c:1386 adapter_init(): clock speed 950 kHz
Debug: 249 6 openocd.c:140 handle_init_command(): Debug Adapter init complete
Debug: 250 6 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 251 6 command.c:143 script_debug(): command - ocd_transport ocd_transport init
Debug: 253 6 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 254 6 hla_transport.c:152 hl_transport_init(): hl_transport_init
Debug: 255 6 hla_transport.c:169 hl_transport_init(): current transport hla_swd
Debug: 256 6 hla_interface.c:42 hl_interface_open(): hl_interface_open
Debug: 257 6 hla_layout.c:40 hl_layout_open(): hl_layout_open
Debug: 258 6 stlink_usb.c:1642 stlink_usb_open(): stlink_usb_open
Debug: 259 6 stlink_usb.c:1659 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x3748 serial: 
Info : 260 10 stlink_usb.c:563 stlink_usb_version(): STLINK v2 JTAG v29 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : 261 10 stlink_usb.c:1770 stlink_usb_open(): using stlink api v2
Debug: 262 10 stlink_usb.c:762 stlink_usb_init_mode(): MODE: 0x02
Info : 263 10 stlink_usb.c:595 stlink_usb_check_voltage(): Target voltage: 3.236027
Debug: 264 10 stlink_usb.c:817 stlink_usb_init_mode(): MODE: 0x01
Debug: 265 12 stlink_usb.c:843 stlink_usb_init_mode(): MODE: 0x02
Debug: 266 12 stlink_usb.c:1785 stlink_usb_open(): Supported clock speeds are:
Debug: 267 12 stlink_usb.c:1788 stlink_usb_open(): 4000 kHz
Debug: 268 12 stlink_usb.c:1788 stlink_usb_open(): 1800 kHz
Debug: 269 12 stlink_usb.c:1788 stlink_usb_open(): 1200 kHz
Debug: 270 12 stlink_usb.c:1788 stlink_usb_open(): 950 kHz
Debug: 271 12 stlink_usb.c:1788 stlink_usb_open(): 480 kHz
Debug: 272 12 stlink_usb.c:1788 stlink_usb_open(): 240 kHz
Debug: 273 12 stlink_usb.c:1788 stlink_usb_open(): 125 kHz
Debug: 274 12 stlink_usb.c:1788 stlink_usb_open(): 100 kHz
Debug: 275 12 stlink_usb.c:1788 stlink_usb_open(): 50 kHz
Debug: 276 12 stlink_usb.c:1788 stlink_usb_open(): 25 kHz
Debug: 277 12 stlink_usb.c:1788 stlink_usb_open(): 15 kHz
Debug: 278 12 stlink_usb.c:1788 stlink_usb_open(): 5 kHz
Debug: 279 12 stlink_usb.c:1808 stlink_usb_open(): Using TAR autoincrement: 4096
Debug: 280 12 hla_interface.c:127 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 281 12 core.c:729 jtag_add_reset(): SRST line released
Debug: 282 12 core.c:753 jtag_add_reset(): TRST line released
Debug: 283 12 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 284 12 hla_interface.c:67 hl_interface_init_target(): hl_interface_init_target
Debug: 285 13 stlink_usb.c:868 stlink_usb_idcode(): IDCODE: 0x1BA01477
Debug: 286 13 openocd.c:153 handle_init_command(): Examining targets...
Debug: 287 13 target.c:1517 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 288 13 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 289 13 target.c:2240 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 290 13 cortex_m.c:1947 cortex_m_examine(): Cortex-M3 r1p1 processor detected
Debug: 291 13 cortex_m.c:1955 cortex_m_examine(): cpuid: 0x411fc231
Debug: 292 13 target.c:2328 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 293 13 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 294 14 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
Debug: 295 14 target.c:2240 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug: 296 14 target.c:2328 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 297 14 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
Debug: 298 14 target.c:2328 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 299 14 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
Debug: 300 15 target.c:2328 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 301 15 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
Debug: 302 15 target.c:2328 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 303 15 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
Debug: 304 16 target.c:2328 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 305 16 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1
Debug: 306 16 target.c:2328 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 307 16 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1
Debug: 308 16 target.c:2328 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 309 16 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1
Debug: 310 17 target.c:2328 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 311 17 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1
Debug: 312 17 cortex_m.c:2046 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2
Debug: 313 17 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
Debug: 314 18 target.c:2240 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 315 18 target.c:2328 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 316 18 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
Debug: 317 18 target.c:2328 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 318 18 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
Debug: 319 18 target.c:2328 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 320 18 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1
Debug: 321 19 target.c:2328 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 322 19 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1
Debug: 323 19 cortex_m.c:1857 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 324 19 cortex_m.c:2056 cortex_m_examine(): stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 325 19 target.c:1517 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 326 19 target.c:4313 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action: 
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0

Debug: 327 19 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 328 20 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 329 20 command.c:143 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 331 20 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 332 21 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 333 21 command.c:143 script_debug(): command - ocd_flash ocd_flash init
Debug: 335 21 tcl.c:1099 handle_flash_init_command(): Initializing flash devices...
Debug: 336 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 337 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 338 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 339 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 340 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 341 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 342 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 343 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 344 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 345 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 346 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 347 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 348 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 349 21 command.c:364 register_command_handler(): registering 'ocd_flash'...
Debug: 350 21 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 351 21 command.c:143 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 353 22 mflash.c:1377 handle_mflash_init_command(): Initializing mflash devices...
Debug: 354 22 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 355 22 command.c:143 script_debug(): command - ocd_nand ocd_nand init
Debug: 357 22 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 358 22 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 359 22 command.c:143 script_debug(): command - ocd_pld ocd_pld init
Debug: 361 22 pld.c:205 handle_pld_init_command(): Initializing PLDs...
Debug: 362 22 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 363 22 command.c:143 script_debug(): command - reset ocd_reset halt
Debug: 365 23 target.c:1535 target_call_reset_callbacks(): target reset 2 (halt)
Debug: 366 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 367 23 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 368 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-start
Debug: 369 23 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-start
Debug: 370 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 371 23 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 372 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 373 23 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 374 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-start
Debug: 375 23 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-start
Debug: 376 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_examine allow-defer
Debug: 377 23 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_examine allow-defer
Debug: 378 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-end
Debug: 379 23 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-end
Debug: 380 23 target.c:4313 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action: 
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0

Debug: 381 23 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 382 23 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 383 23 command.c:143 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 385 24 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 386 24 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 387 24 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 388 24 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 389 24 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 390 24 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset assert 1
Debug: 391 24 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset assert 1
Debug: 392 24 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 393 24 hla_target.c:483 adapter_assert_reset(): adapter_assert_reset
Debug: 394 26 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 395 26 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 396 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 397 27 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 398 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 399 27 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 400 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 401 27 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 402 27 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 403 27 hla_target.c:546 adapter_deassert_reset(): adapter_deassert_reset
Debug: 404 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 405 27 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 406 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 407 27 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 408 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu was_examined
Debug: 409 27 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu was_examined
Debug: 410 27 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 411 27 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 412 28 target.c:2802 target_wait_state(): waiting for target halted...
Debug: 413 28 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 414 28 target.c:2240 target_read_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 415 28 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 416 29 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 0  value 0x40010000
Debug: 417 29 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 418 29 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 1  value 0xe0000000
Debug: 419 29 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 420 30 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 2  value 0x40003000
Debug: 421 30 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 422 30 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 3  value 0xaaaa
Debug: 423 30 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 424 31 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 4  value 0x0
Debug: 425 31 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 426 31 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 5  value 0x799282
Debug: 427 31 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 428 32 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 6  value 0xe000e000
Debug: 429 32 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 430 32 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 7  value 0x97466a8e
Debug: 431 32 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 432 33 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 8  value 0xfffffeff
Debug: 433 33 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 434 33 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 9  value 0xffefffdc
Debug: 435 33 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 436 34 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 10  value 0xb5357fe5
Debug: 437 34 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 438 34 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 11  value 0xda55518f
Debug: 439 34 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 440 35 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 12  value 0xfffffbbf
Debug: 441 35 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 442 35 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 13  value 0x200001fc
Debug: 443 35 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 444 36 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 14  value 0xffffffff
Debug: 445 36 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 446 36 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 15  value 0x1ffff020
Debug: 447 36 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 448 37 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 16  value 0x1000000
Debug: 449 37 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 450 37 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 17  value 0x200001fc
Debug: 451 37 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 452 38 hla_target.c:73 adapter_load_core_reg_u32(): load from core reg 18  value 0xf17dd5fc
Debug: 453 38 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 454 38 hla_target.c:130 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 455 38 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 456 39 hla_target.c:130 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 457 39 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 458 39 hla_target.c:130 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 459 39 hla_target.c:58 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 460 40 hla_target.c:130 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 461 40 hla_target.c:431 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x1ffff020, target->state: halted
Debug: 462 40 target.c:1517 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 463 40 target.c:1517 target_call_event_callbacks(): target event 1 (halted)
User : 464 40 armv7m.c:556 armv7m_arch_state(): target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x1ffff020 msp: 0x200001fc
Debug: 465 40 hla_target.c:470 adapter_poll(): halted: PC: 0x1ffff020
Debug: 466 40 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu curstate
Debug: 467 40 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu curstate
Debug: 468 41 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-end
Debug: 469 41 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-end
Debug: 470 41 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash read_bank 0 firmwareF1___.bin 0 0x10000
Debug: 471 41 command.c:143 script_debug(): command - ocd_flash ocd_flash read_bank 0 firmwareF1___.bin 0 0x10000
Debug: 473 41 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 474 42 target.c:2240 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 475 42 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0042000 4 1
Debug: 476 42 target.c:2240 target_read_u32(): address: 0xe0042000, value: 0x20036410
Info : 477 42 stm32f1x.c:866 stm32x_probe(): device id = 0x20036410
Debug: 478 42 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 479 43 target.c:2240 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 480 43 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0x1ffff7e0 2 1
Debug: 481 43 target.c:2264 target_read_u16(): address: 0x1ffff7e0, value: 0x0040
Info : 482 43 stm32f1x.c:994 stm32x_probe(): flash size = 64kbytes
Debug: 483 43 core.c:109 flash_driver_read(): call flash_driver_read()
Debug: 484 43 target.c:2091 target_read_buffer(): reading buffer of 65536 byte at 0x08000000
Debug: 485 43 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0x08000000 4 16384
User : 486 1057 command.c:544 command_print(): wrote 65536 bytes to file firmwareF1___.bin from flash bank 0 at offset 0x00000000 in 1.015651s (63.014 KiB/s)
Debug: 487 1057 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_reset
Debug: 488 1057 command.c:143 script_debug(): command - reset ocd_reset
Debug: 489 1057 log.c:431 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (1057). This may cause trouble with GDB connections.
Debug: 492 1058 target.c:1535 target_call_reset_callbacks(): target reset 1 (run)
Debug: 493 1058 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 494 1058 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 495 1058 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-start
Debug: 496 1058 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-start
Debug: 497 1058 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 498 1058 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 499 1058 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 500 1059 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 501 1059 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-start
Debug: 502 1059 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-start
Debug: 503 1059 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_examine allow-defer
Debug: 504 1059 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_examine allow-defer
Debug: 505 1059 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-end
Debug: 506 1059 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-end
Debug: 507 1059 target.c:4313 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action: 
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0

Debug: 508 1059 hla_target.c:750 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 509 1060 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 510 1060 command.c:143 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 512 1060 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 513 1061 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 514 1061 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 515 1061 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 516 1061 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 517 1061 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset assert 0
Debug: 518 1061 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset assert 0
Debug: 519 1061 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 520 1061 hla_target.c:483 adapter_assert_reset(): adapter_assert_reset
Debug: 521 1064 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 522 1064 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 523 1064 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 524 1064 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 525 1064 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 526 1064 command.c:143 script_debug(): command - ocd_transport ocd_transport select
Debug: 527 1064 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset deassert 0
Debug: 528 1064 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset deassert 0
Debug: 529 1064 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 530 1064 hla_target.c:546 adapter_deassert_reset(): adapter_deassert_reset
Debug: 531 1064 target.c:1517 target_call_event_callbacks(): target event 3 (resume-start)
Debug: 532 1064 hla_target.c:598 adapter_resume(): adapter_resume 1 0x00000000 0 0
Debug: 533 1064 target.c:1899 target_free_all_working_areas_restore(): freeing all working areas
Debug: 534 1064 target.c:2328 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 535 1064 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 536 1065 armv7m.c:144 armv7m_restore_context():  
Debug: 537 1065 target.c:2328 target_write_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 538 1065 hla_target.c:764 adapter_write_memory(): adapter_write_memory 0xe000edf8 4 1
Debug: 539 1066 target.c:1517 target_call_event_callbacks(): target event 2 (resumed)
Debug: 540 1066 target.c:1517 target_call_event_callbacks(): target event 4 (resume-end)
Debug: 541 1066 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 542 1066 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 543 1066 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-end
Debug: 544 1066 command.c:143 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-end
Debug: 545 1067 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_shutdown
Debug: 546 1067 command.c:143 script_debug(): command - shutdown ocd_shutdown
User : 548 1067 server.c:627 handle_shutdown_command(): shutdown command invoked
Debug: 549 1067 hla_interface.c:117 hl_interface_quit(): hl_interface_quit
$ echo $?
0

---

Note: The procedure found here does not work to me

$ openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash read_bank 0 dump_flash.bin"
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v29 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.237616
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x08000188 msp: 0x20000688
  flash read_bank bank_id filename offset length

$ echo $?
1

Uploading a new firmware

The original board was not detected by SO as show below

$ dmesg
[96955.681863] usb 2-1: new full-speed USB device number 76 using xhci_hcd
[96955.809832] usb 2-1: device descriptor read/64, error -71
[96956.045886] usb 2-1: device descriptor read/64, error -71
[96956.281871] usb 2-1: new full-speed USB device number 77 using xhci_hcd
[96956.409897] usb 2-1: device descriptor read/64, error -71
[96956.649891] usb 2-1: device descriptor read/64, error -71
[96956.757988] usb usb2-port1: attempt power cycle
[96957.169867] usb 2-1: new full-speed USB device number 78 using xhci_hcd
[96957.170047] usb 2-1: Device not responding to setup address.
[96957.378039] usb 2-1: Device not responding to setup address.
[96957.585859] usb 2-1: device not accepting address 78, error -71
[96957.713870] usb 2-1: new full-speed USB device number 79 using xhci_hcd
[96957.714049] usb 2-1: Device not responding to setup address.
[96957.922048] usb 2-1: Device not responding to setup address.
[96958.129872] usb 2-1: device not accepting address 79, error -71
[96958.129982] usb usb2-port1: unable to enumerate USB device

Now, trying to upload a new firmware (after the backup is done!)

$ openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash write_image erase buck50.bin 0x08000000" -c "reset" -c shutdown
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v29 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.245003
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x1ffff020 msp: 0x200001fc
auto erase enabled
Info : device id = 0x20036410
Info : flash size = 64kbytes
target halted due to breakpoint, current mode: Thread 
xPSR: 0x61000000 pc: 0x2000003a msp: 0x200001fc
wrote 23552 bytes from file buck50.bin in 1.322169s (17.396 KiB/s)
shutdown command invoked
$ echo $?
0

Reading the firmware

$ openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg -c init -c "reset halt" -c "flash read_bank 0 new_firmware.bin 0 0x10000" -c "reset" -c shutdown
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v29 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.235473
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x1ffff020 msp: 0x200001fc
Info : device id = 0x20036410
Info : flash size = 64kbytes
wrote 65536 bytes to file new_firmware.bin from flash bank 0 at offset 0x00000000 in 1.003524s (63.775 KiB/s)
shutdown command invoked
$ echo $?
0

Comparing hashes

$ md5sum new_firmware.bin 
d2b9752b83ca78dfb9bfabebb23cc3b9  new_firmware.bin
$ md5sum buck50.bin 
dfc25969132c68a212b4cece12d07160  buck50.bin

Both are different! Why? But now it is recognized!

$ dmesg
[97561.301455] usb 2-1: USB disconnect, device number 82
[97565.206080] usb 2-1: new full-speed USB device number 83 using xhci_hcd
[97565.355539] usb 2-1: New USB device found, idVendor=0483, idProduct=5740, bcdDevice= 2.00
[97565.355545] usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[97565.355548] usb 2-1: Product: STM32 Virtual COM Port
[97565.355552] usb 2-1: Manufacturer: STMicroelectronics
[97565.355554] usb 2-1: SerialNumber: 87033727495085480669ff49
[97565.357117] cdc_acm 2-1:1.0: ttyACM0: USB ACM device

By pushing the old firmware file (the original one that blinks the board LED), the board is not identified by SO but returns to blink the board LED as before (original application delivered with the board).

By pushing the old firmware file (the original one that blinks the board LED), the board is not identified by SO but returns to blink the board LED as before (original application delivered with the board).

Sometimes my ST-LINK can't detect STM32 when i forgot to enable Debug > Serial Wire