gistfile1.txt

MXV11-B2 Y3.0 

General syntax is 

[CSR] command [UNIT] 
[CSR] is optional (octal) - see manual for default 
[UNIT] is optional (octal) - 0 is default 

Command is one of - 

DL - boot RL01 or RL02                  DY - boot RX02 
DX - boot RX01                          MS - boot TSV05 
DU - boot MSCP                          NP - boot DECnet via DPV11 
NU - boot DECnet via DUV11              NE - boot DECnet via DLV11-E 
NF - boot DECnet via DLV11-F            DD - boot TU58 


TM - test memory                        CL - clock on or off 
MP - show memory map                    IN - initialize bus 
LD - load boot block                    "/" - examine or deposit memory 
TS - Serial line  test                  TF - Floating point  test 
TC - clock test 
BOOT>  MP 


CPU OPTIONS

Processor Type =  3
Type Control C to Quit

MEMORY 
Starting   Ending       Length
Address    Address      in words

00000000 -  00377776     00200000

I/O 
Starting   Ending       Length
Address    Address      in words

17765000 -  17765776     00000400
17772300 -  17772316     00000010
17772340 -  17772356     00000010
17772516 -  17772516     00000001
17773000 -  17773776     00000400
17776540 -  17776546     00000004
17777520 -  17777520     00000001
17777524 -  17777524     00000001
17777546 -  17777546     00000001
17777560 -  17777566     00000004
17777572 -  17777616     00000013
17777640 -  17777656     00000010
17777776 -  17777776     00000001
BOOT> ^C