Tang nano 9k problem with UART under litex.

gistfile1.txt

PROBLEM:
my tang nano 9k was having problems with uart under litex. It looks like problem with internal UART to USB converter.
pin 17 and 18(default used in `litex_boards/platforms/sipeed_tang_nano_9k.py` file) are connected to BL702,
so I assume that this is problem with proprietary software made my sipeed.

HOW TO FIX:
Change pins of UART and use external UART to USB module.
change `serial` pins in `_io` array.
to do this change lines from 34 to 39 to this:
```
    # Serial
    ("serial", 0,
        Subsignal("rx", Pins("41")),
        Subsignal("tx", Pins("42")),
        IOStandard("LVCMOS33")
    ),
```
pins 41 and 42 are just example.

Hi, are you using linux? I get this too, but seems not all board have this problem. Actually is not litex problem, i try with simple uart in verilog + gowin eda the problem still persist.