Currently this is how I have the DUO Board wired to my ST-LINK V2.
ST-LINK V2 REDBEAR DUO
+-------------------+
| |
| D1 |
| |
| D2 |
| |
RST <=> JTAG_TRST | D3 |
| |
JTAG_TDO | D4 |
| |
JTAG_TDI | D5 |
| |
SWCLK <=> JTAG_TCK | D6 |
| |
SWDIO <=> JTAG_TMS | D7 |
| |
GND <=> | GND |
| |
| VBAT |
| |
| |
| |
| |
+-------------------+
So to setup I downloaded the WICED SDK 3.5.2 from broadcomm and merged in the files from the Redbear WICED repo https://github.com/redbear/WICED-SDK.
First thing I tried is from the docs WICED Firmware Management with RBLink all the files for OpenOCD are in https://github.com/redbear/WICED-SDK/tree/master/WICED-SDK-3.5.2/tools/OpenOCD
./make redbear.rgb-RB_DUO JTAG=RBLINK download run
But this uses the RBLINK which seems to be an ST-LINK V2-1, RBLINK.cfg below.
# This is a SPARK-CORE board with a single STM32F103MD chip.
source [find ./tools/OpenOCD/stlink-v2-1.cfg]
set WORKAREASIZE 0x4000
#source [find ./tools/OpenOCD/stm32f2x.cfg]
# use hardware reset, connect under reset
reset_config srst_only srst_nogate
proc Unlock () {
mww 0x40023C08 0x08192A3B; mww 0x40023C08 0x4C5D6E7F; mdw 0x40023c14
mww 0x40023C14 0x0fffaaec; sleep 200; mdw 0x40023c14
mww 0x40023C14 0x0fffaaef; sleep 200; mdw 0x40023c14
}
So I figure I need something which uses the stlink-v2 like ./tools/OpenOCD/scripts/interface/stlink-v2.cfg.
#
# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
#
interface hla
hla_layout stlink
hla_device_desc "ST-LINK/V2"
hla_vid_pid 0x0483 0x3748
# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
# number reset issues.
# eg.
#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
So i tried out.
$ ./tools/OpenOCD/OSX/openocd-all-brcm-libftdi -f ./tools/OpenOCD/scripts/interface/stlink-v2.cfg -f ./tools/OpenOCD/stm32f2x.cfg
Open On-Chip Debugger 0.9.0-00029-g812f48a-dirty (2015-05-28-16:33)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.229120
Info : stm32f2x.cpu: hardware has 0 breakpoints, 0 watchpoints
invalid command name "mmw"
in procedure 'init'
in procedure 'ocd_bouncer'
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f2x.cpu failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f2x.cpu failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 300ms
What I am missing is something to replace RBLINK.cfg.
I wired up the STLINK-V2 to my EMW-3165 (STM32F4CE11 ?) as above, one thing I can think of is if you're powering your board externally, avoid connecting the STLINK Vref to the +3.3V onboard.