Z77P-D3.txt

# Maintained by: xenatt for: Gigabyte Z77P-D3at: Mon Dec 30 16:01:49 UTC 2013
# Patch Name   : GA-Z77P-D3
# Note         : base on PJALM Gigabyte General z77 patch

# Add the DTGP method
into method label DTGP remove_entry;
into definitionblock code_regex . insert begin
Method (DTGP, 5, NotSerialized)\n
{\n
	If (LEqual (Arg0, Buffer (0x10)\n
		{\n
			/* 0000 */	0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,\n
			/* 0008 */	0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B\n
		}))\n
	{\n
		If (LEqual (Arg1, One)) {\n
			If (LEqual (Arg2, Zero)) {\n
				Store (Buffer (One) { 0x03 }, Arg4)\n
				Return (One)\n
			}\n
			If (LEqual (Arg2, One)) {\n
				Return (One)\n
			}\n
		}\n
	}\n
	Store (Buffer (One) { 0x00 }, Arg4)\n
	Return (Zero)\n
}
end;

# Add Darwin to the supported operating systems
into method label _INI code_regex \{(\s+)(If\s\(_OSI\s\("Windows\s2001"\)\)) replace_matched begin  {\n
						If (_OSI ("Darwin"))\n
						{\n
							Store (0x2710, OSYS)\n
						}\n
\n
						$2
end;

# Intel 7 Series Fixes
into_all all code_regex _T_([0-6]) replaceall_matched begin T_%1 end;
into device label EC0 set_label begin EC end;
into_all all code_regex EC0 replaceall_matched begin EC end;
into method label _REG parent_label EC remove_entry;
into device label COPR set_label begin MATH end;
into_all all code_regex COPR replaceall_matched begin MATH end;
into_all all code_regex 0x000EC00 replaceall_matched begin 0x000EC000 end;
into_all all code_regex 0xFEC0000 replaceall_matched begin 0xFEC00000 end;
into_all all code_regex (Name\s\(_HID,\s"ABCDEFGH") replace_matched begin Name (_HID, EisaId ("PNP0C15") end;
into device label SIO1 code_regex 0x00(,\s+//\s+L) replaceall_matched begin 0x01%1 end;
into_all all code_regex (Acquire\s\(MUT0,\s0x)....\) replace_matched begin %1FFFF) end;
into_all all code_regex pnp0c14 replaceall_matched begin PNP0C14 end;
into method label _CRS parent_label PCI0 code_regex CreateDWordField\s\(BUF0,\s\\_SB.PCI0._Y0F._LEN,\sMSLN\) replace_matched begin CreateQWordField (BUF0, \\_SB.PCI0._Y0F._LEN, MSLN) end;

# Fix TPM
into method label _HID parent_label _SB.PCI0.LPCB.TPM code_regex (Return\s\(Zero\)\s*) removeall_matched;
into method label _HID parent_label _SB.PCI0.LPCB.TPM insert begin Return (Zero) end;

## Method UXDV in definitionblock
into method label UXDV code_regex ([\s\S]*) store_%8;
into method label UXDV remove_entry;
into definitionblock code_regex . insert begin Method (UXDV, 1, Serialized)\n{\n\n} end;
into method label UXDV code_regex .* replace_matched begin %8 end;

## Method _DOD in GFX0
into method label _DOD parent_label GFX0 code_regex ([\s\S]*) store_%8;
into method label _DOD parent_label GFX0 remove_entry;
into device label GFX0 insert begin Method (_DOD, 0, Serialized)\n{\n\n} end;
into method label _DOD parent_label GFX0 code_regex .* replace_matched begin %8 end;


## Method _DSM in _SB.PCI0.LPCB.TPM
into method label _DSM parent_label _SB.PCI0.LPCB.TPM code_regex (([\s\S])*) store_%8;
into method label _DSM parent_label _SB.PCI0.LPCB.TPM remove_entry;
into scope label _SB.PCI0.LPCB.TPM insert begin Method (_DSM, 4, Serialized)\n{\n} end;
into method label _DSM parent_label _SB.PCI0.LPCB.TPM code_regex .* replace_matched begin %8 end;

## Method _DSM in _SB.PCI0.ITPM
into method label _DSM parent_label _SB.PCI0.ITPM code_regex (([\s\S])*) store_%8;
into method label _DSM parent_label _SB.PCI0.ITPM remove_entry;
into device Label _SB.PCI0.ITPM insert begin Method (_DSM, 4, Serialized)\n{\n} end;
into method label _DSM parent_label _SB.PCI0.ITPM code_regex .* replace_matched begin %8 end;

## Method RRIO in definitionblock
into method label RRIO code_regex ([\s\S]*) store_%8;
into method label RRIO remove_entry;
into definitionblock code_regex . insert begin Method (RRIO, 4, Serialized)\n{\n\n} end;
into method label RRIO code_regex .* replace_matched begin %8 end;

# Add the missing MCHC device
into device label MCHC parent_label PCI0 remove_entry;
into device label PCI0 insert begin
Device (MCHC)\n
{\n
	Name (_ADR, Zero)\n
}
end;

# Fix the LPC Device
into method label _DSM parent_label LPCB remove_entry;
into device label LPCB insert begin
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x02) {\n
		"device-id", Buffer (0x04) {0x44,0x1E,0x00,0x00}\n
	}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

# Fix the SMBUS to allow for loading of the AppleSMBusController.kext
into device label BUS0 parent_label SBUS remove_entry;
into device label SBUS insert begin
Device (BUS0)\n
{\n
	Name (_CID, "smbus")\n
	Name (_ADR, Zero)\n
	Device (DVL0)\n
	{\n
		Name (_ADR, 0x57)\n
		Name (_CID, "diagsvault")\n
		Method (_DSM, 4, NotSerialized)\n
		{\n
			Store (Package (0x02) {\n
				"address", 0x57
			}, Local0)\n
			DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
			Return (Local0)\n
		}\n
	}\n
}
end;

# Change ID of SATA device for Intel 7 Series Chipset
into device label SAT0 set_label begin SATA end;
into_all all code_regex SAT0 replaceall_matched begin SATA end;
into device label SAT1 remove_entry;
into method label _DSM parent_label SATA remove_entry;
into device label SATA insert begin
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x0A) {\n
		"AAPL,slot-name", "Built In",\n
		"name", "Intel AHCI Controller",\n
		"model", Buffer (0x2D) {"Intel 7 Series Chipset Family SATA Controller"},\n
		"device_type", Buffer (0x0F) {"AHCI Controller"},\n
		"device-id", Buffer (0x04) {0x03,0x1E,0x00,0x00}\n
	}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

# Patches the Intel USB3 on Intel 7 Series chipsets to allow more power output
#Fix EHC1
into method label _DSM parent_label EHC1 remove_entry;
into device label EHC1 insert begin
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x15) {\n
		"AAPL,slot-name", "Built In",\n
		"name", "Intel EHCI Controller",\n
		"model", Buffer(0x3E) {"Intel 7 Series Chipset Family USB Enhanced Host Controller #1"},\n
		"device_type", Buffer (0x0E) {"USB Controller"},\n
		"AAPL,current-available", 0x0834,\n
		"AAPL,current-extra", 0x0A8C,\n
		"AAPL,current-in-sleep", 0x03E8,\n
		"AAPL,current-extra-in-sleep", 0x0834,\n
		"AAPL,max-port-current-in-sleep", 0x0A8C,\n
		"AAPL,device-internal", 0x02,\n
		Buffer (One) {0x00}\n
	}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

#Fix EHC2
into method label _DSM parent_label EHC2 remove_entry;
into device label EHC2 insert begin
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x15) {\n
		"AAPL,slot-name", "Built In",\n
		"name", "Intel EHCI Controller",\n
		"model", Buffer (0x3E) {"Intel 7 Series Chipset Family USB Enhanced Host Controller #2"},\n
		"device_type", Buffer (0x0E) {"USB Controller"},\n
		"AAPL,current-available", 0x0834,\n
		"AAPL,current-extra", 0x0A8C,\n
		"AAPL,current-in-sleep", 0x03E8,\n
		"AAPL,current-extra-in-sleep", 0x0834,\n
		"AAPL,max-port-current-in-sleep", 0x0A8C,\n
		"AAPL,device-internal", 0x02,\n
		Buffer (One) {0x00}\n
	}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

#Fix XHC1
into device label XHC set_label begin XHC1 end;
into_all all code_regex XHC(?=\W) replaceall_matched begin XHC1 end;
into method label _DSM parent_label XHC1 remove_entry;
into device label XHC1 insert begin
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x15) {\n
		"AAPL,slot-name", "Built In",\n
		"name", "Intel XHCI Controller",\n
		"model", Buffer (0x37) {"Intel 7 Series Chipset Family USB xHCI Host Controller"},\n
		"device_type", Buffer (0x0E) {"USB Controller"},\n
		"AAPL,current-available", 0x0834,\n
		"AAPL,current-extra", 0x0A8C,\n
		"AAPL,current-in-sleep", 0x03E8,\n
		"AAPL,current-extra-in-sleep", 0x0834,\n
		"AAPL,max-port-current-in-sleep", 0x0A8C,\n
		"AAPL,device-internal", 0x02,\n
		Buffer (One) {0x00}\n
	}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

# Intel z77 USB2/USB3 Multiplexing Fix
# USB3 patches in thanks to SJ_Underwater and Mieze
# Code optimizations thanks to RehabMan and PikeRAlpha

# Add method OSDW to the main block, it's used by the USB3 patches
into method label OSDW remove_entry;
into definitionblock code_regex . insert
begin
Method (OSDW, 0, NotSerialized)\n
{\n
	If (LEqual (OSYS, 0x2710))\n
	{\n
		Return (One)\n
	}\n
	Else\n
	{\n
		Return (Zero)\n
	}\n
}
end;

# Fix method _OSC
into method label _OSC parent_label PCI0 remove_entry;
into device label PCI0 parent_label _SB insert
begin
Method (_OSC, 4, Serialized)\n
{\n
	Store (Arg3, Local0)\n
	CreateDWordField (Local0, Zero, CDW1)\n
	CreateDWordField (Local0, 0x04, CDW2)\n
	CreateDWordField (Local0, 0x08, CDW3)\n
	Store (CDW2, SUPP)\n
	Store (CDW3, CTRL)\n
	If (LEqual (One, OSDW ()))\n
	{\n
		If (LAnd (LEqual (Arg0, GUID), NEXP))\n
		{\n
			If (Not (And (CDW1, One)))\n
			{\n
				If (And (CTRL, 0x02))\n
				{\n
					NHPG ()\n
				}\n
\n
				If (And (CTRL, 0x04))\n
				{\n
					NPME ()\n
				}\n
			}\n
\n
			If (LNotEqual (Arg1, One))\n
			{\n
				Or (CDW1, 0x08, CDW1)\n
			}\n
\n
			If (LNotEqual (CDW3, CTRL))\n
			{\n
				Or (CDW1, 0x10, CDW1)\n
			}\n
\n
			Store (CTRL, CDW3)\n
			Store (CTRL, OSCC)\n
			Return (Local0)\n
		}\n
		Else\n
		{\n
			Or (CDW1, 0x04, CDW1)\n
			Return (Local0)\n
		}\n
	}\n
	Else\n
	{\n
		If (LEqual (Arg0, Buffer (0x10)\n
			{\n
				/* 0000 */   0xA9, 0x12, 0x95, 0x7C, 0x05, 0x17, 0xB4, 0x4C,\n
				/* 0008 */   0xAF, 0x7D, 0x50, 0x6A, 0x24, 0x23, 0xAB, 0x71\n
			}))\n
		{\n
			Store (One, ^XHC1.PASS)\n
			Store (One, ^XHC1.PAHC)\n
			Store (One, ^XHC1.PBSS)\n
			Store (One, ^XHC1.PBHC)\n
			Store (One, ^XHC1.PCSS)\n
			Store (One, ^XHC1.PCHC)\n
			Store (One, ^XHC1.PDSS)\n
			Store (One, ^XHC1.PDHC)\n
		}\n
		Return (Local0)\n
	}\n
}
end;

# Fix EHC1
into Device label PR11 code_regex Name\s\(MUXS[^)]+\) remove_matched;
into device label PR11 parent_label PR01 insert begin Name (MUXS, "XHCA") end;
into Device label PR12 code_regex Name\s\(MUXS[^)]+\) remove_matched;
into device label PR12 parent_label PR01 insert begin Name (MUXS, "XHCB") end;
into Device label PR13 code_regex Name\s\(MUXS[^)]+\) remove_matched;
into device label PR13 parent_label PR01 insert begin Name (MUXS, "XHCC") end;
into Device label PR18 code_regex Name\s\(MUXS[^)]+\) remove_matched;
into device label PR18 parent_label PR01 insert begin Name (MUXS, "XHCD") end;

into method label XHCA parent_label EHC1 remove_entry;
into method label XHCB parent_label EHC1 remove_entry;
into method label XHCC parent_label EHC1 remove_entry;
into method label XHCD parent_label EHC1 remove_entry;
into method label EHCA parent_label EHC1 remove_entry;
into method label EHCB parent_label EHC1 remove_entry;
into method label EHCC parent_label EHC1 remove_entry;
into method label EHCD parent_label EHC1 remove_entry;
into method label XHCN parent_label EHC1 remove_entry;
into device label EHC1 code_regex Name\s\(XHCN,\sOne\) remove_matched;

into device label EHC1 insert begin
Name (XHCN, One)\n
Method (XHCA, 0, NotSerialized)\n
{\n
	Store (One, ^^XHC1.PAHC)\n
}\n
Method (XHCB, 0, NotSerialized)\n
{\n
	Store (One, ^^XHC1.PBHC)\n
}\n
Method (XHCC, 0, NotSerialized)\n
{\n
	Store (One, ^^XHC1.PCHC)\n
}\n
Method (XHCD, 0, NotSerialized)\n
{\n
	Store (One, ^^XHC1.PDHC)\n
}\n
Method (EHCA, 0, NotSerialized)\n
{\n
	Store (Zero, ^^XHC1.PAHC)\n
}\n
Method (EHCB, 0, NotSerialized)\n
{\n
	Store (Zero, ^^XHC1.PBHC)\n
}\n
Method (EHCC, 0, NotSerialized)\n
{\n
	Store (Zero, ^^XHC1.PCHC)\n
}\n
Method (EHCD, 0, NotSerialized)\n
{\n
	Store (Zero, ^^XHC1.PDHC)\n
}\n
end;

# Fix EHC2
into method label XHCN parent_label EHC2 remove_entry;
into device label EHC2 code_regex Name\s\(XHCN,\sOne\) remove_matched;
into device label EHC2 insert begin Name (XHCN, One)\n end;

# Fix XHC1
into device label XHC set_label begin XHC1 end;
into_all all code_regex XHC(?=\W) replaceall_matched begin XHC1 end;
into method label _WAK code_regex \_SB.PCI0.XHC1.XWAK replace_matched begin _SB.PCI0.XHC1._INI end;

into device label XHC1 replace_content begin
Name (_ADR, 0x00140000)\n
Name (_S3D, 0x02)\n
Name (_S4D, 0x02)\n
Name (XRST, Zero)\n
\n
OperationRegion (XPRT, PCI_Config, 0x74, 0x10)\n
Field (XPRT, DWordAcc, NoLock, Preserve)\n
{\n
	Offset (0x01),\n
	PMEE,   1,\n
		,   6,\n
	PMES,   1\n
}\n
\n
OperationRegion (XH1C, PCI_Config, 0xD0, 0x10)\n
Field (XH1C, ByteAcc, NoLock, Preserve)\n
{\n
	PAHC,   1,\n
	PBHC,   1,\n
	PCHC,   1,\n
	PDHC,   1,\n
	Offset (0x08),\n
	PASS,   1,\n
	PBSS,   1,\n
	PCSS,   1,\n
	PDSS,   1\n
}\n
\n
OperationRegion (XHC2, PCI_Config, 0x44, 0x04)\n
Field (XHC2, ByteAcc, NoLock, Preserve)\n
{\n
	Offset (0x01),\n
	MIAI,   2\n
}\n
\n
Method (_INI, 0, NotSerialized)\n
{\n
	If (OSDW ())\n
	{\n
		Store (Zero, MIAI)\n
	}\n
\n
	If (LAnd (LGreaterEqual (OSYS, 0x07DC), LLess (OSYS, 0x2710)))\n
	{\n
		Store (One, PASS)\n
		Store (One, PAHC)\n
		Store (One, PBSS)\n
		Store (One, PBHC)\n
		Store (One, PCSS)\n
		Store (One, PCHC)\n
		Store (One, PDSS)\n
		Store (One, PDHC)\n
	}\n
}\n
\n
Device (RHUB)\n
{\n
	Name (_ADR, Zero)\n
	Device (PRT1)\n
	{\n
		Name (_ADR, One)\n
		Method (_UPC, 0, Serialized)\n
		{\n
			Name (UPCP, Package (0x04)\n
			{\n
				0xFF,\n
				0x03,\n
				Zero,\n
				Zero\n
			})\n
			Return (UPCP)\n
		}\n
\n
		Method (_PLD, 0, Serialized)\n
		{\n
			Name (PLDP, Package (0x01)\n
			{\n
				Buffer (0x10)\n
				{\n
					/* 0000 */   0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,\n
					/* 0008 */   0x69, 0x0C, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00\n
				}\n
			})\n
			Return (PLDP)\n
		}\n
		Name (MUXS, "EHCA")\n
	}\n
\n
	Device (PRT2)\n
	{\n
		Name (_ADR, 0x02)\n
		Method (_UPC, 0, Serialized)\n
		{\n
			Name (UPCP, Package (0x04)\n
			{\n
				0xFF,\n
				0x03,\n
				Zero,\n
				Zero\n
			})\n
			Return (UPCP)\n
		}\n
\n
		Method (_PLD, 0, Serialized)\n
		{\n
			Name (PLDP, Package (0x01)\n
			{\n
				Buffer (0x10)\n
			{\n
					/* 0000 */   0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,\n
					/* 0008 */   0x69, 0x0C, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00\n
				}\n
			})\n
			Return (PLDP)\n
		}\n
		Name (MUXS, "EHCB")\n
	}\n
\n
	Device (PRT3)\n
	{\n
		Name (_ADR, 0x03)\n
		Method (_UPC, 0, Serialized)\n
		{\n
			Name (UPCP, Package (0x04)\n
			{\n
				0xFF,\n
				0x03,\n
				Zero,\n
				Zero\n
			})\n
			Return (UPCP)\n
		}\n
\n
		Method (_PLD, 0, Serialized)\n
		{\n
			Name (PLDP, Package (0x01)\n
			{\n
				Buffer (0x10)\n
				{\n
					/* 0000 */   0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,\n
					/* 0008 */   0x69, 0x0C, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00\n
				}\n
			})\n
			Return (PLDP)\n
		}\n
		Name (MUXS, "EHCC")\n
	}\n
\n
	Device (PRT4)\n
	{\n
		Name (_ADR, 0x04)\n
		Method (_UPC, 0, Serialized)\n
		{\n
			Name (UPCP, Package (0x04)\n
			{\n
				0xFF,\n
				0x03,\n
				Zero,\n
				Zero\n
			})\n
			Return (UPCP)\n
		}\n
\n
		Method (_PLD, 0, Serialized)\n
		{\n
			Name (PLDP, Package (0x01)\n
			{\n
				Buffer (0x10)\n
				{\n
					/* 0000 */   0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,\n
					/* 0008 */   0x69, 0x0C, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00\n
				}\n
			})\n
			Return (PLDP)\n
		}\n
		Name (MUXS, "EHCD")\n
	}\n
}\n
\n
Method (_PRW, 0, NotSerialized)\n
{\n
	Return (GPRW (0x0D, 0x04))\n
}\n
\n
Method (XHCA, 0, NotSerialized)\n
{\n
	Store (One, PAHC)\n
}\n
\n
Method (XHCB, 0, NotSerialized)\n
{\n
	Store (One, PBHC)\n
}\n
\n
Method (XHCC, 0, NotSerialized)\n
{\n
	Store (One, PCHC)\n
}\n
\n
Method (XHCD, 0, NotSerialized)\n
{\n
	Store (One, PDHC)\n
}\n
\n
Method (EHCA, 0, NotSerialized)\n
{\n
	Store (Zero, PAHC)\n
}\n
\n
Method (EHCB, 0, NotSerialized)\n
{\n
	Store (Zero, PBHC)\n
}\n
\n
Method (EHCC, 0, NotSerialized)\n
{\n
	Store (Zero, PCHC)\n
}\n
\n
Method (EHCD, 0, NotSerialized)\n
{\n
	Store (Zero, PDHC)\n
}\n
\n
Method (_DSM, 4, NotSerialized)\n
{\n
	Store (Package (0x15)\n
		{\n
			"AAPL,slot-name", "Built In",\n
			"name", "Intel xHCI Controller",\n
			"model", "Intel 7 Series Chipset Family USB xHCI Host Controller",\n
			"device_type", "USB Controller",\n
			"AAPL,current-available", 0x0834,\n
			"AAPL,current-extra", 0x0A8C,\n
			"AAPL,current-in-sleep", 0x03E8,\n
			"AAPL,current-extra-in-sleep", 0x0834,\n
			"AAPL,max-port-current-in-sleep", 0x0A8C,\n
			"AAPL,device-internal", 0x02,\n
			Buffer (One) {0x00}\n
		}, Local0)\n
	DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))\n
	Return (Local0)\n
}
end;

# Maintained by: toleda for: github.com/toleda/audio_alc8xx
# File: hdef1-alc8xx_audio-1.txt_v2.0
# Credit: PikeRAlpha
#
# Add_HDEF, for dsdts with no HDEF, set Audio_ID: 1
#
# 1. Enable Audio ID: 1, Add HDEF/layout-id=1
into method label _DSM parent_adr 0x001B0000 remove_entry;
into device name_adr 0x001B0000 insert
begin
    Method (_DSM, 4, NotSerialized)\n
    {\n
	    If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }\n
	    Return (Package()\n
	    {\n
                "layout-id", Buffer() { 0x01, 0x00, 0x00, 0x00 },\n
                "PinConfigurations", Buffer(Zero) {},\n
  	        "hda-gfx", Buffer() { "onboard-1" },\n
	    })\n
    }\n
end;
into definitionblock code_regex . insert
begin Store ("hdef1-alc8xx_audio-1.txt_v2.0 dsdt edits, github.com/toleda", Debug) end;