Created
February 13, 2023 05:40
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Files that cause siliwiz to fail
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{ | |
"version": 1, | |
"app": "siliwiz", | |
"timestamp": 1676266623, | |
"rects": [ | |
{ "x": 14.4, "y": 18, "height": 363, "width": 372, "layer": "p substrate" }, | |
{ "x": 118.4, "y": 147, "height": 118, "width": 152, "layer": "n diffusion" }, | |
{ "x": 341.4, "y": 350, "height": 28, "width": 39, "layer": "p tap" }, | |
{ "x": 180.4, "y": 129, "height": 158, "width": 31, "layer": "polysilicon" }, | |
{ "x": 345.4, "y": 352, "height": 24, "width": 32, "layer": "metal1 via" }, | |
{ "x": 102.4, "y": 184, "height": 39, "width": 33, "layer": "metal1 via" }, | |
{ "x": 176.4, "y": 107, "height": 34, "width": 38, "layer": "metal1 via" }, | |
{ "x": 254.4, "y": 179, "height": 44, "width": 37, "layer": "metal1 via" }, | |
{ "x": 347.4, "y": 352, "height": 23, "width": 29, "layer": "metal1", "label": "vss" }, | |
{ "x": 104.4, "y": 186, "height": 36, "width": 30, "layer": "metal1", "label": "vss" }, | |
{ "x": 257.4, "y": 184, "height": 33, "width": 31, "layer": "metal1", "label": "vdd" }, | |
{ "x": 179.4, "y": 109, "height": 29, "width": 30, "layer": "metal1", "label": "in" } | |
], | |
"graph": { | |
"dcSweep": false, | |
"minInVoltage": 0, | |
"maxInVoltage": 5, | |
"pulseDelay": 0, | |
"riseTime": 50, | |
"signalNames": "in out i(vdd)*-1000" | |
} | |
} |
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{ | |
"version": 1, | |
"app": "siliwiz", | |
"timestamp": 1676266613, | |
"rects": [ | |
{ "x": 14.4, "y": 18, "height": 363, "width": 372, "layer": "p substrate" }, | |
{ "x": 118.4, "y": 147, "height": 118, "width": 152, "layer": "n diffusion" }, | |
{ "x": 341.4, "y": 350, "height": 28, "width": 39, "layer": "p tap" }, | |
{ "x": 180.4, "y": 129, "height": 158, "width": 31, "layer": "polysilicon" }, | |
{ "x": 345.4, "y": 352, "height": 24, "width": 32, "layer": "metal1 via" }, | |
{ "x": 102.4, "y": 184, "height": 39, "width": 33, "layer": "metal1 via" }, | |
{ "x": 176.4, "y": 107, "height": 34, "width": 38, "layer": "metal1 via" }, | |
{ "x": 254.4, "y": 179, "height": 44, "width": 37, "layer": "metal1 via" }, | |
{ "x": 23.4, "y": 321, "height": 29, "width": 29, "layer": "metal1 via" }, | |
{ "x": 347.4, "y": 352, "height": 23, "width": 29, "layer": "metal1", "label": "vss" }, | |
{ "x": 104.4, "y": 186, "height": 36, "width": 30, "layer": "metal1", "label": "vss" }, | |
{ "x": 257.4, "y": 184, "height": 33, "width": 31, "layer": "metal1", "label": "vdd" }, | |
{ "x": 179.4, "y": 109, "height": 29, "width": 30, "layer": "metal1", "label": "in" }, | |
{ "x": 21.4, "y": 316, "height": 34, "width": 38, "layer": "metal1", "label": "out" } | |
], | |
"graph": { | |
"dcSweep": false, | |
"minInVoltage": 0, | |
"maxInVoltage": 5, | |
"pulseDelay": 0, | |
"riseTime": 50, | |
"signalNames": "in out i(vdd)*-1000" | |
} | |
} |
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