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// Quick and dirty NRF52840 PWM abstraction | |
// don't use in production | |
#include "cmsis.h" | |
#include "sdk_config.h" | |
#include "nrf_drv_pwm.h" | |
static const nrf_drv_pwm_t m_pwm_driver[4] = { | |
NRF_DRV_PWM_INSTANCE(0), | |
NRF_DRV_PWM_INSTANCE(1), | |
NRF_DRV_PWM_INSTANCE(2), | |
NRF_DRV_PWM_INSTANCE(3) | |
}; | |
#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F)) | |
nrf_drv_pwm_config_t const config[3] = { | |
{ | |
.output_pins = | |
{ | |
NRF_GPIO_PIN_MAP(0, 4) | NRF_DRV_PWM_PIN_INVERTED, // channel 0 | |
NRF_GPIO_PIN_MAP(0, 6) | NRF_DRV_PWM_PIN_INVERTED, // channel 1 | |
NRF_GPIO_PIN_MAP(0,13) | NRF_DRV_PWM_PIN_INVERTED, // channel 2 | |
NRF_GPIO_PIN_MAP(0,12) | NRF_DRV_PWM_PIN_INVERTED, // channel 3 | |
}, | |
.irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY, | |
.base_clock = NRF_PWM_CLK_1MHz, | |
.count_mode = NRF_PWM_MODE_UP, | |
.top_value = 1000, | |
.load_mode = NRF_PWM_LOAD_INDIVIDUAL, | |
.step_mode = NRF_PWM_STEP_AUTO | |
}, | |
{ | |
.output_pins = | |
{ | |
NRF_GPIO_PIN_MAP(0,26) | NRF_DRV_PWM_PIN_INVERTED, // channel 0 | |
NRF_GPIO_PIN_MAP(0, 8) | NRF_DRV_PWM_PIN_INVERTED, // channel 1 | |
NRF_GPIO_PIN_MAP(1,10) | NRF_DRV_PWM_PIN_INVERTED, // channel 2 | |
NRF_GPIO_PIN_MAP(1,13) | NRF_DRV_PWM_PIN_INVERTED, // channel 3 | |
}, | |
.irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY, | |
.base_clock = NRF_PWM_CLK_1MHz, | |
.count_mode = NRF_PWM_MODE_UP, | |
.top_value = 1000, | |
.load_mode = NRF_PWM_LOAD_INDIVIDUAL, | |
.step_mode = NRF_PWM_STEP_AUTO | |
}, | |
{ | |
.output_pins = | |
{ | |
NRF_GPIO_PIN_MAP(1, 9) | NRF_DRV_PWM_PIN_INVERTED, // channel 0 | |
NRF_GPIO_PIN_MAP(1,15) | NRF_DRV_PWM_PIN_INVERTED, // channel 1 | |
NRF_DRV_PWM_PIN_NOT_USED, // channel 2 | |
NRF_DRV_PWM_PIN_NOT_USED, // channel 3 | |
}, | |
.irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY, | |
.base_clock = NRF_PWM_CLK_1MHz, | |
.count_mode = NRF_PWM_MODE_UP, | |
.top_value = 1000, | |
.load_mode = NRF_PWM_LOAD_INDIVIDUAL, | |
.step_mode = NRF_PWM_STEP_AUTO | |
} | |
}; | |
void init(){ | |
for(int i=0; i<3; i++){ | |
nrf_drv_pwm_init(&m_pwm_driver[i], &config[i], NULL); | |
} | |
} | |
static nrf_pwm_values_individual_t seq_values[3] = { | |
{0,0,0,0}, | |
{0,0,0,0}, | |
{0,0,0,0} | |
}; | |
const nrf_pwm_sequence_t seq[3] = | |
{ | |
{ | |
.values = {.p_individual = &seq_values[0]}, | |
.length = NRF_PWM_VALUES_LENGTH(seq_values[0]), | |
.repeats = 0, | |
.end_delay = 0 | |
}, | |
{ | |
.values = {.p_individual = &seq_values[1]}, | |
.length = NRF_PWM_VALUES_LENGTH(seq_values[1]), | |
.repeats = 0, | |
.end_delay = 0 | |
}, | |
{ | |
.values = {.p_individual = &seq_values[2]}, | |
.length = NRF_PWM_VALUES_LENGTH(seq_values[2]), | |
.repeats = 0, | |
.end_delay = 0 | |
} | |
}; | |
void set10(uint16_t new_val[10]){ | |
seq_values[0].channel_0 = new_val[0]; | |
seq_values[0].channel_1 = new_val[1]; | |
seq_values[0].channel_2 = new_val[2]; | |
seq_values[0].channel_3 = new_val[3]; | |
seq_values[1].channel_0 = new_val[4]; | |
seq_values[1].channel_1 = new_val[5]; | |
seq_values[1].channel_2 = new_val[6]; | |
seq_values[1].channel_3 = new_val[7]; | |
seq_values[2].channel_0 = new_val[8]; | |
seq_values[2].channel_1 = new_val[9]; | |
// not used channels | |
seq_values[2].channel_2 = 0; | |
seq_values[2].channel_3 = 0; | |
for(int i=0; i<3; i++){ | |
nrf_drv_pwm_simple_playback(&m_pwm_driver[i], &seq[i], 0, NRF_DRV_PWM_FLAG_LOOP); | |
} | |
} |
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