Created
April 20, 2022 07:53
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u-boot> setclk 55 | |
Selected profile 55: | |
- CPU: 560 MHz | |
- RAM: 450 MHz | |
- AHB: 225 MHz | |
- SPI: 28 MHz | |
Target values: | |
SPI_CTRL: 0x00000243 | |
CPU_PLL_CFG: 0x00021380 | |
DDR_PLL_CFG: 0x00212C00 | |
CPU_DDR_CLK_CTRL: 0x01308000 | |
NFRAC_MIN in CPU_PLL_DITHER: 0/64 | |
NFRAC_MIN in DDR_PLL_DITHER: 256/1024 | |
Erase FLASH from 0x9F010000 to 0x9F01FFFF in bank #1 | |
Erasing: # | |
Erased sectors: 1 | |
Copying to FLASH... | |
Writing at address: 0x9F010000 | |
Done! | |
** Notice: | |
selected clocks configuration saved in FLASH, | |
you can restart the device with 'res' command | |
If the device does not start, use recovery mode | |
with button connected to GPIO14 (active in low) | |
u-boot> md 0x9F01FFE0 | |
9F01FFE0: 504C4C73 00000243 00021380 00212C00 PLLs...C.....!,. | |
9F01FFF0: 01308000 00000000 00040000 00000000 .0.............. | |
9F020000: 00000000 00000000 00000000 00000000 ................ | |
9F020010: 00000000 00000000 00000000 00000000 ................ | |
9F020020: 00000000 00000000 00000000 00000000 ................ | |
9F020030: 00000000 00000000 00000000 00000000 ................ | |
9F020040: 00000000 00000000 00000000 00000000 ................ | |
9F020050: 00000000 00000000 00000000 00000000 ................ | |
9F020060: 00000000 00000000 00000000 00000000 ................ | |
9F020070: 00000000 00000000 00000000 00000000 ................ | |
9F020080: 00000000 00000000 00000000 00000000 ................ | |
9F020090: 00000000 00000000 00000000 00000000 ................ | |
9F0200A0: 00000000 00000000 00000000 00000000 ................ | |
9F0200B0: 00000000 00000000 00000000 00000000 ................ | |
9F0200C0: 00000000 00000000 00000000 00000000 ................ | |
9F0200D0: 00000000 00000000 00000000 00000000 ................ | |
u-boot> |
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