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@zephray
Created December 18, 2018 01:46
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Mooneye GB acceptance tests

Test GB BOY Colour GB BOY
add sp e timing πŸ‘ πŸ‘
boot div dmg0 ❌ ❌
boot div dmgABCmgb ❌ πŸ‘
boot div S ❌ ❌
boot div2 S ❌ ❌
boot hwio dmg0 ❌ ❌
boot hwio dmgABCmgb ❌ πŸ‘
boot hwio S ❌ ❌
boot regs dmg0 ❌ ❌
boot regs dmgABC ❌ πŸ‘
boot regs mgb ❌ ❌
boot regs sgb ❌ ❌
boot regs sgb2 ❌ ❌
call timing πŸ‘ πŸ‘
call timing2 πŸ‘ πŸ‘
call cc_timing πŸ‘ πŸ‘
call cc_timing2 πŸ‘ πŸ‘
di timing GS ❌ πŸ‘
div timing πŸ‘ πŸ‘
ei sequence πŸ‘ πŸ‘
ei timing πŸ‘ πŸ‘
halt ime0 ei πŸ‘ πŸ‘
halt ime0 nointr_timing πŸ‘ πŸ‘
halt ime1 timing πŸ‘ πŸ‘
halt ime1 timing2 GS ❌ πŸ‘
if ie registers πŸ‘ πŸ‘
intr timing πŸ‘ πŸ‘
jp timing πŸ‘ πŸ‘
jp cc timing πŸ‘ πŸ‘
ld hl sp e timing πŸ‘ πŸ‘
oam dma_restart πŸ‘ πŸ‘
oam dma start πŸ‘ πŸ‘
oam dma timing πŸ‘ πŸ‘
pop timing πŸ‘ πŸ‘
push timing πŸ‘ πŸ‘
rapid di ei πŸ‘ πŸ‘
ret timing πŸ‘ πŸ‘
ret cc timing πŸ‘ πŸ‘
reti timing πŸ‘ πŸ‘
reti intr timing πŸ‘ πŸ‘
rst timing πŸ‘ πŸ‘
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