Rockchip DRM mode dump patch

0017-Dumping-validated-modes-for-testing-purposes.patch

From d0bc59667cc10fe9938928fd426ee96805497282 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 9 May 2020 18:07:33 +0200
Subject: [PATCH] Dumping validated modes for testing purposes

In order to pinpoint why some people still not have 4K res enabled.

Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 74 ++++++++++++++++++++-
 1 file changed, 71 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index f95cdc53a..35292b2b5 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -215,9 +215,68 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
        return 0;
 }
 
+
+static void drm_display_mode_dump(
+       const struct drm_display_mode *mode)
+{
+       printk(KERN_ERR
+               "[drm_display_mode_dump] Modeline " DRM_MODE_FMT "\n",
+               DRM_MODE_ARG(mode));
+       printk(KERN_ERR
+               "[drm_display_mode_dump] Listing modes : %s\n"
+               "\tint crtc_clock        : %d\n"
+               "\tint crtc_hdisplay     : %d\n"
+               "\tint crtc_hblank_start : %d\n"
+               "\tint crtc_hblank_end   : %d\n"
+               "\tint crtc_hsync_start  : %d\n"
+               "\tint crtc_hsync_end    : %d\n"
+               "\tint crtc_htotal       : %d\n"
+               "\tint crtc_hskew        : %d\n"
+               "\tint crtc_vdisplay     : %d\n"
+               "\tint crtc_vblank_start : %d\n" 
+               "\tint crtc_vblank_end   : %d\n"
+               "\tint crtc_vsync_start  : %d\n"
+               "\tint crtc_vsync_end    : %d\n"
+               "\tint crtc_vtotal       : %d\n",
+               mode->name,
+               mode->crtc_clock,
+               mode->crtc_hdisplay,
+               mode->crtc_hblank_start,
+               mode->crtc_hblank_end,
+               mode->crtc_hsync_start,
+               mode->crtc_hsync_end,
+               mode->crtc_htotal,
+               mode->crtc_hskew,
+               mode->crtc_vdisplay,
+               mode->crtc_vblank_start,
+               mode->crtc_vblank_end,
+               mode->crtc_vsync_start,
+               mode->crtc_vsync_end,
+               mode->crtc_vtotal);
+}
+
+static void drm_display_info_dump_color_format(
+       struct drm_display_info * info)
+{
+       u32 const color_format = info->color_formats;
+       printk(KERN_ERR
+               "[drm_display_info_dump_color_format]\n"
+               "\tDRM_COLOR_FORMAT_RGB444   : %d"
+               "\tDRM_COLOR_FORMAT_YCRCB444 : %d"
+               "\tDRM_COLOR_FORMAT_YCRCB422 : %d"
+               "\tDRM_COLOR_FORMAT_YCRCB420 : %d",
+               (color_format >> 0) & 1,
+               (color_format >> 1) & 1,
+               (color_format >> 2) & 1,
+               (color_format >> 3) & 1);
+
+}
+
+
 static enum drm_mode_status
-dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
-                           const struct drm_display_mode *mode)
+dw_hdmi_rockchip_mode_valid(
+       struct drm_connector *connector,
+       const struct drm_display_mode *mode)
 {
        struct drm_display_info *info = &connector->display_info;
        int max_tmds_clock = info->max_tmds_clock > 0 ?
@@ -226,13 +285,22 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
 
        int clock = mode->clock;
 
+       drm_display_mode_dump(mode);
+       drm_display_info_dump_color_format(info);
        if (connector->ycbcr_420_allowed && drm_mode_is_420(info, mode) &&
            (info->color_formats & DRM_COLOR_FORMAT_YCRCB420))
                clock /= 2;
 
-       if (clock > max_tmds_clock)
+       printk(KERN_ERR "[dw_hdmi_rockchip_mode_valid] RESULT !");
+       if (clock > max_tmds_clock) {
+               printk(KERN_ERR 
+                       "[dw_hdmi_rockchip_mode_valid] CLOCK HIGH !\n"
+                       "\tmax_tmds_clock %d (used : %d)",
+                       info->max_tmds_clock, max_tmds_clock);
                return MODE_CLOCK_HIGH;
+       }
 
+       printk(KERN_ERR "[dw_hdmi_rockchip_mode_valid] MODE_OK\n");
        return MODE_OK;
 }
 
-- 
2.26.2