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@Wren6991
Last active January 19, 2022 19:42
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BruceMIPS/MHz
#ifdef HAZARD3
#include "tb_cxxrtl_io.h"
#define printf tb_printf
#else
#include <stdio.h>
#endif
#include <stdint.h>
int __attribute__((noinline)) test(int x) {
int count = 0;
while (x != 1) {
++count;
if (x & 1) {
x = 3 * x + 1;
}
else {
x = x >> 1;
}
}
return count;
}
int main() {
uint32_t instr0, instr1;
uint32_t cyc0, cyc1;
asm volatile (
"csrr %0, mcycle\n"
"csrr %1, minstret\n"
: "=r" (cyc0), "=r" (instr0)
);
int result = test(69);
asm volatile (
"csrr %0, mcycle\n"
"csrr %1, minstret\n"
: "=r" (cyc1), "=r" (instr1)
);
uint32_t instr = instr1 - instr0;
uint32_t cyc = cyc1 - cyc0;
printf("Result (expect 14): %d\n", result);
printf("Instructions %u\n", instr);
printf("Cycles: %u\n", cyc);
printf("Instr/kcyc: %u\n", (uint32_t)(1000ull * instr) / cyc);
}
Result (expect 14): 14
Instructions 106
Cycles: 126
Instr/kcyc: 841
000004f0 <test>:
4f0: 00050713 mv a4,a0
4f4: 00100793 li a5,1
4f8: 00000513 li a0,0
4fc: 04f70063 beq a4,a5,53c <test+0x4c>
500: 00100613 li a2,1
504: 00171793 slli a5,a4,0x1
508: 00177693 andi a3,a4,1
50c: 00e787b3 add a5,a5,a4
510: 00150513 addi a0,a0,1
514: 00068e63 beqz a3,530 <test+0x40>
518: 00178713 addi a4,a5,1
51c: 00171793 slli a5,a4,0x1
520: 00177693 andi a3,a4,1
524: 00e787b3 add a5,a5,a4
528: 00150513 addi a0,a0,1
52c: fe0696e3 bnez a3,518 <test+0x28>
530: 40175713 srai a4,a4,0x1
534: fcc718e3 bne a4,a2,504 <test+0x14>
538: 00008067 ret
53c: 00008067 ret
00000324: (b0002973) csrrs x18, 0xb00, x0 : x18 <- 000000af :
00000328: (b02029f3) csrrs x19, 0xb02, x2 : x19 <- 000000b0 :
0000032c: (04500513) addi x10, x0, 69 : x10 <- 00000045 :
00000330: (1c0000ef) jal x1, 000004f0 : x1 <- 00000334 : pc <- 000004f0
000004f0: (00050713) addi x14, x10, 0 : x14 <- 00000045 :
000004f4: (00100793) addi x15, x0, 1 : x15 <- 00000001 :
000004f8: (00000513) addi x10, x0, 0 : x10 <- 00000000 :
000004fc: (04f70063) beq x14, x15, 0000053c : :
00000500: (00100613) addi x12, x0, 1 : x12 <- 00000001 :
00000504: (00171793) slli x15, x14, 1 : x15 <- 0000008a :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000001 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 000000cf :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000001 :
00000514: (00068e63) beq x13, x0, 00000530 : :
00000518: (00178713) addi x14, x15, 1 : x14 <- 000000d0 :
0000051c: (00171793) slli x15, x14, 1 : x15 <- 000001a0 :
00000520: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
00000524: (00e787b3) add x15, x15, x14 : x15 <- 00000270 :
00000528: (00150513) addi x10, x10, 1 : x10 <- 00000002 :
0000052c: (fe0696e3) bne x13, x0, 00000518 : :
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000068 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 000000d0 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 00000138 :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000003 :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000034 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000068 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000009c :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000004 :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 0000001a :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000034 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000004e :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000005 :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 0000000d :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 0000001a :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000001 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 00000027 :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000006 :
00000514: (00068e63) beq x13, x0, 00000530 : :
00000518: (00178713) addi x14, x15, 1 : x14 <- 00000028 :
0000051c: (00171793) slli x15, x14, 1 : x15 <- 00000050 :
00000520: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
00000524: (00e787b3) add x15, x15, x14 : x15 <- 00000078 :
00000528: (00150513) addi x10, x10, 1 : x10 <- 00000007 :
0000052c: (fe0696e3) bne x13, x0, 00000518 : :
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000014 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000028 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000003c :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000008 :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 0000000a :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000014 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000001e :
00000510: (00150513) addi x10, x10, 1 : x10 <- 00000009 :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000005 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 0000000a :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000001 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000000f :
00000510: (00150513) addi x10, x10, 1 : x10 <- 0000000a :
00000514: (00068e63) beq x13, x0, 00000530 : :
00000518: (00178713) addi x14, x15, 1 : x14 <- 00000010 :
0000051c: (00171793) slli x15, x14, 1 : x15 <- 00000020 :
00000520: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
00000524: (00e787b3) add x15, x15, x14 : x15 <- 00000030 :
00000528: (00150513) addi x10, x10, 1 : x10 <- 0000000b :
0000052c: (fe0696e3) bne x13, x0, 00000518 : :
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000008 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000010 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 00000018 :
00000510: (00150513) addi x10, x10, 1 : x10 <- 0000000c :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000004 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000008 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 0000000c :
00000510: (00150513) addi x10, x10, 1 : x10 <- 0000000d :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000002 :
00000534: (fcc718e3) bne x14, x12, 00000504 : : pc <- 00000504
00000504: (00171793) slli x15, x14, 1 : x15 <- 00000004 :
00000508: (00177693) andi x13, x14, 0x1 : x13 <- 00000000 :
0000050c: (00e787b3) add x15, x15, x14 : x15 <- 00000006 :
00000510: (00150513) addi x10, x10, 1 : x10 <- 0000000e :
00000514: (00068e63) beq x13, x0, 00000530 : : pc <- 00000530
00000530: (40175713) srai x14, x14, 1 : x14 <- 00000001 :
00000534: (fcc718e3) bne x14, x12, 00000504 : :
00000538: (00008067) jalr x0, x1, 0 : : pc <- 00000334
00000334: (00050593) addi x11, x10, 0 : x11 <- 0000000e :
00000338: (b00024f3) csrrs x9, 0xb00, x0 : x9 <- 00000119 :
0000033c: (b0202473) csrrs x8, 0xb02, x2 : x8 <- 0000011a :
add/addi: 37
beq/bne: 26
slli/srai: 25
andi: 14
jal: 1
jalr: 1
2 csrrs instructions are also counted in results.
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