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@apritzel
Created September 4, 2025 14:03
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Basic Allwinner A733 devicetree file (just pinctrl + serial + PMIC)
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
// Copyright (C) 2025 Arm Ltd.
/dts-v1/;
//#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x000>;
};
};
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
apbclk: apb-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "apbclk";
};
timer {
compatible = "arm,armv8-timer";
arm,no-tick-in-suspend;
// interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <1 13 4>,
<1 14 4>,
<1 11 4>,
<1 10 4>;
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
pio: pinctrl@2000000 {
compatible = "allwinner,sun60i-a733-pinctrl";
reg = <0x2000000 0x2000>;
// interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <0 69 4>,
<0 71 4>,
<0 73 4>,
<0 75 4>,
<0 77 4>,
<0 79 4>,
<0 81 4>,
<0 83 4>,
<0 85 4>,
<0 87 4>;
clocks = <&apbclk>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
mmc0_pins: mmc0-pins {
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
allwinner,pinmux = <2>;
function = "mmc0";
drive-strength = <30>;
bias-pull-up;
};
uart0_pb_pins: uart0-pb-pins {
pins = "PB0", "PB1";
allwinner,pinmux = <3>;
function = "uart0";
};
};
uart0: serial@2500000 {
compatible = "snps,dw-apb-uart";
reg = <0x02500000 0x1000>;
// interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0 2 4>;
reg-shift = <2>;
reg-io-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
clocks = <&osc24M>;
};
gic: interrupt-controller@3400000 {
compatible = "arm,gic-v3";
#address-cells = <1>;
#interrupt-cells = <3>;
#size-cells = <1>;
ranges;
interrupt-controller;
reg = <0x3400000 0x10000>,
<0x3460000 0x100000>;
// interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <1 9 4>;
dma-noncoherent;
its: msi-controller@3440000 {
compatible = "arm,gic-v3-its";
reg = <0x3440000 0x20000>;
msi-controller;
#msi-cells = <1>;
dma-noncoherent;
};
};
mmc0: mmc@4020000 {
compatible = "allwinner,sun60i-a733-mmc",
"allwinner,sun20i-d1-mmc";
reg = <0x04020000 0x1000>;
clocks = <&apbclk>, <&osc24M>;
clock-names = "ahb", "mmc";
// interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0 161 4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
max-frequency = <150000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
cap-sdio-irq;
#address-cells = <1>;
#size-cells = <0>;
};
r_pio: pinctrl@7025000 {
compatible = "allwinner,sun60i-a733-r-pinctrl";
reg = <0x7025000 0x800>;
// interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <0 198 4>,
<0 200 4>;
clocks = <&apbclk>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
r_i2c_pins: r-i2c-pins {
pins = "PL0" ,"PL1";
allwinner,pinmux = <2>;
function = "r_i2c0";
};
};
r_i2c0: i2c@7083000 {
compatible = "allwinner,sun60i-a733-i2c",
"allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07083000 0x1000>;
// interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0 203 4>;
clocks = <&osc24M>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pmic@36 {
compatible = "x-powers,axp318w";
reg = <0x36>;
#interrupt-cells = <0x01>;
interrupt-controller;
};
};
};
};
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