Created
January 5, 2025 18:15
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hack to make U-Boot's SPL return to FEL on A523 (by re-enabling GICv3 interrupts before returning to BROM)
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diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S | |
index cee030e4809..42a7c93b97a 100644 | |
--- a/arch/arm/cpu/armv8/fel_utils.S | |
+++ b/arch/arm/cpu/armv8/fel_utils.S | |
@@ -65,7 +65,7 @@ ENTRY(return_to_fel) | |
/* AArch32 code to restore the state from fel_stash and return back to FEL. */ | |
back_in_32: | |
- .word 0xe59f0028 // ldr r0, [pc, #40] ; load fel_stash address | |
+ .word 0xe59f0038 // ldr r0, [pc, #56] ; load fel_stash address | |
.word 0xe5901008 // ldr r1, [r0, #8] | |
.word 0xe129f001 // msr CPSR_fc, r1 | |
.word 0xf57ff06f // isb | |
@@ -76,6 +76,11 @@ back_in_32: | |
.word 0xe590100c // ldr r1, [r0, #12] | |
.word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR | |
.word 0xf57ff06f // isb | |
+ .word 0xe3a000f0 // mov r0, #0xf0 | |
+ .word 0xee040f16 // mcr 15, 0, r0, cr4, cr6, {0} ; ICC_PMR | |
+ .word 0xe3a00001 // mov r0, #1 | |
+ .word 0xee0c0ffc // mcr 15, 0, r0, cr12, cr12, {7}; ICC_IGRPEN1 | |
+ | |
.word 0xe12fff1e // bx lr ; return to FEL | |
fel_stash_addr: | |
.word 0x00000000 // receives fel_stash addr, by AA64 code above |
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