allow compiling Allwinner ARMv8 U-Boot port in 32-bit

0001-sunxi-allow-32-bit-builds-for-64-bit-SoCs.patch

From df83929ef745bcecf8235a38dd5f4dfd33a38b03 Mon Sep 17 00:00:00 2001
From: Andre Przywara <[email protected]>
Date: Tue, 5 Feb 2019 16:06:24 +0000
Subject: [PATCH] sunxi: allow 32-bit builds for 64-bit SoCs

At the moment we build the SPL and U-Boot proper for the 64-bit AArch64
instruction set. But since the cores provide an AArch32 compatibility mode
and in fact the BootROM runs in 32-bit mode, it can be useful to have at
least the SPL run in AArch32 as well. This has two advantages:
- As AArch32 features the compact Thumb2 instruction encoding, we can
  get a much smaller image size, which is a relief for our SPL.
- Staying in AArch32, with the MMU turned off, allows an easy return to
  the BootROM and its FEL mode, without jumping through all the hoops
  required to go to AArch64 and back, and carefully restoring all state.

Introduce a Kconfig option which toggles between CONFIG_ARM64 and
CONFIG_CPU_V7A, to allow easy switching between the two modes. This can
be manually selected in menuconfig, for experimenation purposes.

Signed-off-by: Andre Przywara <[email protected]>
---
 arch/arm/mach-sunxi/Kconfig    | 22 +++++++++++++++++-----
 arch/arm/mach-sunxi/Makefile   |  2 +-
 include/configs/sunxi-common.h |  2 ++
 3 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 28ec4f98a17..6e406c4d4ba 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -285,10 +285,17 @@ config MACH_SUNXI_H3_H5
 # TODO: try out A80's 8GiB DRAM space
 config SUNXI_DRAM_MAX_SIZE
 	hex
+	default 0xC0000000 if SUNXI_ARMV8_32BIT_BUILD
 	default 0x100000000 if MACH_SUN50I_H616 || MACH_SUN55I_A523
 	default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
 	default 0x80000000
 
+config SUNXI_ARMV8_32BIT_BUILD
+	bool "Build 32-bit binaries for ARMv8 SoCs"
+	select SPL_ARMV7_SET_CORTEX_SMPEN
+	select SYS_ARCH_TIMER
+	default n
+
 choice
 	prompt "Sunxi SoC Variant"
 	optional
@@ -444,7 +451,8 @@ config MACH_SUN9I
 
 config MACH_SUN50I
 	bool "sun50i (Allwinner A64)"
-	select ARM64
+	select ARM64 if !SUNXI_ARMV8_32BIT_BUILD
+	select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD
 	select SUN6I_PRCM
 	select SUNXI_DE2
 	select SUNXI_GEN_SUN6I
@@ -458,7 +466,8 @@ config MACH_SUN50I
 
 config MACH_SUN50I_H5
 	bool "sun50i (Allwinner H5)"
-	select ARM64
+	select ARM64 if !SUNXI_ARMV8_32BIT_BUILD
+	select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD
 	select MACH_SUNXI_H3_H5
 	select MMC_SUNXI_HAS_NEW_MODE
 	select FIT
@@ -466,20 +475,23 @@ config MACH_SUN50I_H5
 
 config MACH_SUN50I_H6
 	bool "sun50i (Allwinner H6)"
-	select ARM64
+	select ARM64 if !SUNXI_ARMV8_32BIT_BUILD
+	select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD
 	select DRAM_SUN50I_H6
 	select SUN50I_GEN_H6
 
 config MACH_SUN50I_H616
 	bool "sun50i (Allwinner H616)"
-	select ARM64
+	select ARM64 if !SUNXI_ARMV8_32BIT_BUILD
+	select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD
 	select DRAM_SUN50I_H616
 	select SUN50I_GEN_H6
 	imply OF_UPSTREAM
 
 config MACH_SUN55I_A523
 	bool "sun55i (Allwinner A523/T527/H728)"
-	select ARM64
+	select ARM64 if !SUNXI_ARMV8_32BIT_BUILD
+	select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD
 	select DRAM_SUN55I_T527
 	select SUNXI_GEN_NCAT2
 	select SUNXI_NEW_PINCTRL
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index a8ef99b125f..76a703725ad 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_MACH_SUN55I_A523)	+= clock_sun55i_t527.o
 else
 obj-$(CONFIG_SUNXI_GEN_NCAT2)	+= clock_sun50i_h6.o
 endif
-ifndef CONFIG_ARM64
+ifeq ($(CONFIG_ARM64)$(CONFIG_SUNXI_ARMV8_32BIT_BUILD),)
 obj-y	+= timer.o
 endif
 
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 6e8217b22d2..8c5c853b5f6 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -14,6 +14,8 @@
 
 #include <linux/stringify.h>
 
+#define CFG_SYS_HZ_CLOCK		24000000
+
 /****************************************************************************
  *                  base addresses for the SPL UART driver                  *
  ****************************************************************************/
-- 
2.46.2