Skip to content

Instantly share code, notes, and snippets.

@apritzel
Created October 24, 2024 00:44
Show Gist options
  • Save apritzel/d6512f00db52bdee3eb8f7e7d930f821 to your computer and use it in GitHub Desktop.
Save apritzel/d6512f00db52bdee3eb8f7e7d930f821 to your computer and use it in GitHub Desktop.
H616 CPU clock notifier patch, to reparent CPU to PLL_PERI0 during DVFS frequency change
commit 5791b78a20997f5bae3e8c5fbdd444dc6a692ae9
Author: Andre Przywara <[email protected]>
Date: Thu Oct 24 01:25:45 2024 +0100
clk: sunxi-ng: h616: Reparent CPU clock during frequency changes
The H616 user manual recommends to re-parent the CPU clock during
frequency changes of the PLL, and recommends PLL_PERI0(1X), which runs
at 600 MHz.
Add a clock notifier for the PLL, using the existing mux clock notifier
callback, and tell it to use mux 4 (the PLL_PERI0(1X) source).
The manual also tells us to re-lock the PLL, though this needs to be
done elsewhere.
Signed-off-by: Andre Przywara <[email protected]>
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
index b758993ee45a0..1c9705461920c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
@@ -1100,11 +1100,18 @@ static const u32 usb2_clk_regs[] = {
SUN50I_H616_USB3_CLK_REG,
};
+static struct ccu_mux_nb sun50i_h616_cpu_nb = {
+ .common = &cpux_clk.common,
+ .cm = &cpux_clk.mux,
+ .delay_us = 1, /* manual doesn't really say */
+ .bypass_index = 4, /* PLL_PERI0(1X)@600MHz, as recommended by manual */
+};
+
static int sun50i_h616_ccu_probe(struct platform_device *pdev)
{
void __iomem *reg;
u32 val;
- int i;
+ int ret, i;
reg = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(reg))
@@ -1154,7 +1161,15 @@ static int sun50i_h616_ccu_probe(struct platform_device *pdev)
val |= BIT(24);
writel(val, reg + SUN50I_H616_HDMI_CEC_CLK_REG);
- return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h616_ccu_desc);
+ ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h616_ccu_desc);
+ if (ret)
+ return ret;
+
+ /* Reparent CPU during PLL CPU rate changes */
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+ &sun50i_h616_cpu_nb);
+
+ return 0;
}
static const struct of_device_id sun50i_h616_ccu_ids[] = {
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment