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@cfelton
Created September 17, 2015 12:30
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multidim array simulation only example
from myhdl import *
def array3(clock, reset, sel1, sel2, data_out):
""" simulation only """
# generate an array of constants
aoc = [[cc for cc in range((ii*3)+1, (ii*3)+4)] for ii in range(3)]
@always_seq(clock.posedge, reset=reset)
def rtlreg():
data_out.next = aoc[sel2][sel1]
return rtlreg
def test_array3():
clock = Signal(bool(0))
reset = ResetSignal(0, active=0, async=True)
sel1, sel2 = [Signal(intbv(0)[2:]) for _ in range(2)]
data_out = Signal(intbv(0)[4:])
def _bench():
tbdut = array3(clock, reset, sel1, sel2, data_out)
@always(delay(5))
def tbclk():
clock.next = not clock
@instance
def tbstim():
reset.next = reset.active
for _ in range(3):
yield clock.posedge
reset.next = not reset.active
yield clock.posedge
sel1.next, sel2.next = 2, 2
for _ in range(8):
yield clock.posedge
# some additional delay ???
assert data_out == 9
for jj in range(3):
sel2.next= jj
for ii in range(3):
sel1.next = ii
yield clock.posedge # clock in sel
yield clock.posedge # clock in data
print(data_out)
assert data_out == 1+jj*3+ii
raise StopSimulation
return tbdut, tbclk, tbstim
Simulation(traceSignals(_bench)).run()
if __name__ == '__main__':
test_array3()
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