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@ashriram
ashriram / Zedboard-pynq-guide.md
Created August 8, 2019 18:11
Building Pynq Linux onto the Zedboard

Quick guide to building Pynq v2.3 onto the Zedboard

Prerequisites

  • Create a Ubuntu 16.04 x64 VM -- 60gb Disk Size, 6gb Ram
  • Install Petalinux 2018.2 onto the VM in your home directory; add it to your PATH variable
  • Download the "Pynq rootfs arm v2.3" image avialble here
  • Download the zedboard 2018.2 BSP file from xilinx

Steps to build

@02015678
02015678 / cdsenv.lisp
Last active October 1, 2022 01:33
My customized .cdsenv file for Cadence Virtuoso IV6.1.6
;===============================================
; Created on Jan.10th, 2015
; <------------------Summary------------------>
; Default Simulator : spectre
; Default Folder : ./simulation
; Spectre Options : APS+ 64bit Multi-thread psfbin
; HSPICE Options : HPP 64bit Multi-thread tr0 Waveview
; Anyline starts with a semi-comma (;) is comment and will be omited by Cadence
;===============================================
; Do not show What's new popup window
@02015678
02015678 / Resistor_Verilog-AMS.v
Created April 17, 2015 16:38
Resistor Model in Verilog-A, used in Cadence Virtuoso
`include "discipline.h"
module polyres_hdl (n2, n1, ctrl2, ctrl1);
//(wr, lr, rtemp, jc1a, jc1b, jc2a, jc2b, tc1, tc2, etch, tnom, rsh0, rmaxvcoef, rminvcoef)
electrical n2, n1, ctrl2, ctrl1;
parameter real lr=0.0;parameter real wr=0.0;
parameter real rtemp=($temperature - 273.15);
parameter real jc1a = 0;parameter real jc1b = 0;
parameter real jc2a = 0;parameter real jc2b= 0;