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PREFIX=/path/to/install
FPGA_ROOT=/root/of/repos
NUM_JOBS=4

# If non-zero, enable sscache optimizations. Need to set CC and CXX as well.
SCCACHE=0
CC=gcc
CXX=g++

# If non-zero, use chipdbs built on another machine.

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[package]
name = "take-api"
version = "0.1.0"
authors = ["William D. Jones <[email protected]>"]
edition = "2018"

[dependencies]
bare-metal = {version = "0.2.5", optional = true }

[dependencies.msp430-rt]

cr1901

# Generated by Yosys 0.8+29 (git sha1 d86ea6ba, x86_64-w64-mingw32-g++ 7.3.0 -Os)
autoidx 712
attribute \cells_not_processed 1
attribute \src "boneless.v:3"
module \boneless_formal
  attribute \src "boneless.v:155"
  wire $0$formal$boneless.v:161$14_CHECK[0:0]$116
  attribute \src "boneless.v:155"
  wire $0$formal$boneless.v:161$14_EN[0:0]$117
  attribute \src "boneless.v:161"

cr1901

Flags table for the operation: a - b

Flag Legend

• Z- Is the result zero?
• S- Is the top bit of the result set?
• C- Did a borrow not occur (see Subtraction on the 6502)?
  • For architectures with a true borrow flag, invert the C bit.
• V- Does the result of a - b fit within signed 16-bit range?

Other notes

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Migen Clock Domains Summary

Terminology

• Declaring a clock domain:
  • self.clock_domains.cd_mycd = ClockDomain()
• Referencing a clock domain:
  • self.sync.mycd += []
  • ClockSignal("mycd")
• Requesting an I/O signal:
• platform.request("clk12")

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PROJECT=quiz_4

check: $(PROJECT).smt2
        yosys-smtbmc -s z3 -t 25 --presat --dump-smt2 $(PROJECT)_bmc.smt2 --dump-vcd $(PROJECT)_bmc.vcd $(PROJECT).smt2
        yosys-smtbmc -s z3 -i -t 25 --presat --dump-smt2 $(PROJECT)_tmp.smt2 --dump-vcd $(PROJECT)_tmp.vcd $(PROJECT).smt2

$(PROJECT).smt2: $(PROJECT).v
        yosys -s formal.ys

clean::

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#!/bin/sh -e

DEFAULT_ROOT=Net-dbg-`date +%Y-%m-%d-%H-%M-%S`
export CVSROOT="[email protected]:/cvsroot"


if [ -z ${SRCROOT+x} ]; then
    mkdir $DEFAULT_ROOT
    cd $DEFAULT_ROOT
    cvs -q checkout -A -P src

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In archive C:/msys64/mingw32/i686-w64-mingw32/lib/libpthread.dll.a:

d000136.o:     file format pe-i386
rw-r--r-- 0/0    271 May 18 07:50 2018 d000136.o
architecture: i386, flags 0x00000038:
HAS_DEBUG, HAS_SYMS, HAS_LOCALS
start address 0x00000000

Characteristics 0x105
	relocations stripped

cr1901

In archive lib/x86/pthreadVC2.lib:

pthreadVC2.dll:     file format pe-i386
--------- 0/0    731 Dec 21 20:07 2006 pthreadVC2.dll
architecture: i386, flags 0x0000003d:
HAS_RELOC, HAS_LINENO, HAS_DEBUG, HAS_SYMS, HAS_LOCALS
start address 0x00000000

Characteristics 0x100
	32 bit words