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jboone / gist:340abf06d38ee220b86f
Created May 10, 2014 18:47
Gnarly Python code to pick through the wreckage of an MPEG-2 transport stream.
#!/usr/bin/env python
#
# Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
@jboone
jboone / SDR Hellschreiber
Created March 3, 2014 16:59
Quick and dirty Hellschreiber code for ToorCon San Diego 15's software defined radio workshop
#!/usr/bin/env python
import math
import numpy
import scipy.fftpack
import scipy.signal
letters = {
@jboone
jboone / gist:8079391
Created December 22, 2013 07:16
Fast third-order CIC for s8:s8 (complex) data.
ldrd t1, t2, [buf], #8 /* 3: t1 = Q3:I3:Q2:I2 */
/* t2 = Q5:I5:Q4:I4 */
/* What if I did this using ROL/ROR and SEL? */
/* Q3:I3:Q2:I2,Q5:I5:Q4:I4 -> */
smuad t3, i, taps /* 1: t3 = I1 * 3 + I0 * 1 */
smuad t4, q, taps /* 1: t4 = Q1 * 3 + Q0 * 1 */
sxtb16 i, t1, ror #0 /* 1: i = I3:I2 */
@jboone
jboone / gist:7713957
Created November 30, 2013 00:46
LPC43xx configuration for controlling CPLD RX decimation.
void sgpio_configure_pin_functions() {
...
scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */
scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */
scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */
sgpio_cpld_stream_rx_set_decimation(0);
GPIO_DIR(GPIO5) |= GPIOPIN14 | GPIOPIN13 | GPIOPIN12;
@jboone
jboone / gist:7713722
Created November 30, 2013 00:22
Quick code to locate discontinuities in a test capture file.
#!/usr/bin/env python
import sys
import numpy
f = open(sys.argv[1], 'rb')
d = f.read(2)
test_data = numpy.arange(-128, 126, dtype=numpy.int8)
@jboone
jboone / gist:6262845
Created August 18, 2013 17:27
My BeagleBone audio cape is now showing up in the Linux kernel's dmesg output, under control of bone-capemgr. W00t!
[ 1.609911] bone-capemgr bone_capemgr.9: Baseboard: 'A335BNLT,0A5A,1613BBBK3540'
[ 1.617713] bone-capemgr bone_capemgr.9: compatible-baseboard=ti,beaglebone-black
[ 1.656793] bone-capemgr bone_capemgr.9: slot #0: No cape found
[ 1.693899] bone-capemgr bone_capemgr.9: slot #1: No cape found
[ 1.731008] bone-capemgr bone_capemgr.9: slot #2: No cape found
[ 1.761297] bone-capemgr bone_capemgr.9: slot #3: 'Howler Audio Cape,0000,ShareBrained,HOWLER-20130530'
[ 1.771303] bone-capemgr bone_capemgr.9: slot #4: specific override
[ 1.777909] bone-capemgr bone_capemgr.9: bone: Using override eeprom data at slot 4
[ 1.785945] bone-capemgr bone_capemgr.9: slot #4: 'Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G'
[ 1.796083] bone-capemgr bone_capemgr.9: slot #5: specific override
@jboone
jboone / gist:6050693
Created July 22, 2013 01:13
Pings from host on PHY0, captured from RXD when RX_DV valid.
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555
@jboone
jboone / gist:5881987
Last active December 19, 2015 02:19
LPC43xx code for GPIO pin interrupts, ripped from the quadrature encoder code of my HackRF spectrum analyzer. (I should clean up that code and post it someday...)
// Pin configuration.
scu_pinmux(SCU_SD_CD, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_SD_DAT3, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
SCU_PINTSEL0 =
(1 << 13) | // GPIO1[6]
(6 << 8) |
(1 << 5) | // GPIO1[5]
(5 << 0)
;
@jboone
jboone / gist:5570497
Created May 13, 2013 18:50
Arduino sketch to manipulate Noritake Graphic DMA parallel interface.
const int pin_led = 13;
const int pin_wr = 8;
const int pin_rdy = 9;
void write_byte(const uint8_t c) {
while( (PINB & 2) == 0 );
PORTB &= 0xfe; // /WR=0
PORTD = c;
PORTB |= 0x01; // /WR=1
@jboone
jboone / gist:5326952
Last active December 15, 2015 21:39
Altera Quartus II barf. Not sure which pins to move where...
Error (169015): Cannot place pin mem_dqs[3] to location AE18
Error (169223): Can't place VREF pin Y17 (VREFGROUP_B4_N2) for pin mem_dqs[3] of type bi-directional with SSTL-18 Class I I/O standard at location AE18
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 4 when the VREF pin Y17 (VREFGROUP_B4_N2) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF18 (pad PAD_227): Pin mem_a[2] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AC17 (pad PAD_231): Pin mem_a[14] of type output uses SSTL-18 Class I I/O standard
Info (169225): Followin