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Jonas Rudloff kokjo

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jonas@x250:~/code/pysvd$ python stlink.py
Target voltage 3.19165580183
Target Coreid 0x0
Peripheral 'AES' - 0x400e0000
Register 'CTRL' DECRYPT=1 DATASTART=0 XORSTART=0 BYTEORDER=0
Register 'CMD' START=1 STOP=0
Register 'STATUS' RUNNING=1
Register 'IEN' DONE=1
Register 'IF' DONE=1
Register 'IFS' DONE=1
class A(type):
def __new__(cls, clsname, bases, attrs):
print cls, clsname, bases, attrs
newclass = super(A, cls).__new__(cls, clsname, bases, attrs)
return newclass
class B(object):
__metaclass__ = A
class C(B): pass
#!/usr/bin/env python
from pwn import *
from subprocess import Popen, PIPE
context(arch='amd64', os='linux', terminal=['sakura','-x'])
r = remote("78.46.163.223", 1336)
r.recvuntil('"')
hsh = r.recvuntil('"')[:-1]
r.recvuntil("ends with ")
num = r.recvuntil(' ')
from pwn import *
import base64
template = """
%%>
%%:pragma clang diagnostic ignored "-Wunused-local-typedef"
%%:pragma clang diagnostic ignored "-Wunused-variable"
%%:define str(x) %%:x
%%:define hxp str(
@kokjo
kokjo / lol.py
Created December 23, 2019 09:23
class LOL:
pass
assert LOL() != LOL()
assert LOL() is not LOL()
assert id(LOL()) != id(LOL())
00000000: 33 33 00 00 00 16 50 7b 9d 66 8d 42 86 dd 60 00 33....P{.f.B..`.
00000010: 00 00 00 24 00 01 fe 80 00 00 00 00 00 00 52 7b ...$..........R{
00000020: 9d ff fe 66 8d 42 ff 02 00 00 00 00 00 00 00 00 ...f.B..........
00000030: 00 00 00 00 00 16 3a 00 05 02 00 00 01 00 8f 00 ......:.........
00000040: 67 3c 00 00 00 01 04 00 00 00 ff 02 00 00 00 00 g<..............
00000050: 00 00 00 00 00 01 ff 66 8d 42 2c c8 39 4a e5 fd .......f.B,.9J..
00000060: ab 83 33 33 00 00 00 16 50 7b 9d 66 8d 42 86 dd ..33....P{.f.B..
00000070: 60 00 00 00 00 24 00 01 fe 80 00 00 00 00 00 00 `....$..........
00000080: 52 7b 9d ff fe 66 8d 42 ff 02 00 00 00 00 00 00 R{...f.B........
00000090: 00 00 00 00 00 00 00 16 3a 00 05 02 00 00 01 00 ........:.......
`default_nettype none
module crc32_top (
input clk, input rst,
input [7:0] data,
output [31:0] state,
);
reg [31:0] state_reg;
wire [31:0] state_next;
crc32 crc32 (
@kokjo
kokjo / ram.v
Created November 12, 2018 21:23
module ram (
clk,
mem_valid, mem_ready,
mem_addr, mem_rdata,
mem_wdata, mem_wstrb
);
input clk;
input mem_valid;
output reg mem_ready;
input [31:0] mem_addr;
@kokjo
kokjo / crack_seed.c
Created May 1, 2017 12:11
Solution for reeses revenge from Defcon quals 2017
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <pthread.h>
typedef struct {
unsigned int s[32];
unsigned int i;
} ctx_t;
@kokjo
kokjo / doit_gameboy.py
Created April 23, 2017 21:19
Please don't judge!
from pwn import *
def ld_c(num): return [0x0e, num & 0xff]
def ld_a(num): return [0x3e, num & 0xff]
def ld_l(num): return [0x2e, num & 0xff]
def ld_h(num): return [0x26, num & 0xff]
def ld_ff_c_a(): return [0xe2]
def set_iomem(reg, val): return ld_c(reg & 0xff) + ld_a(val) + ld_ff_c_a()
def ld_a_hl_inc(): return [0x2a]
def adc_a_hl(): return [0x8e]