Created
April 6, 2020 21:54
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| diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c | |
| index a3dc2ba19fb2..e45819777679 100644 | |
| --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c | |
| +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c | |
| @@ -722,6 +722,19 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) | |
| high_tmds_clock_ratio = mode->clock > 340000; | |
| scrambling = high_tmds_clock_ratio || | |
| hdmi->scdc.scrambling.low_rates; | |
| + // high clock ratio requires scrambling | |
| + ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &config); | |
| + if (ret < 0) { | |
| + NV_ERROR(drm, "Failure to read SCDC_TMDS_CONFIG: %d\n", ret); | |
| + return; | |
| + } | |
| + config &= ~(SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE); | |
| + config |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 * high_tmds_clock_ratio; | |
| + config |= SCDC_SCRAMBLING_ENABLE * scrambling; | |
| + ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, config); | |
| + if (ret < 0) | |
| + NV_ERROR(drm, "Failure to write SCDC_TMDS_CONFIG = 0x%02x: %d\n", | |
| + config, ret); | |
| } | |
| args.pwr.scdc = | |
| @@ -742,18 +755,6 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) | |
| if (!hdmi->scdc.scrambling.supported) | |
| return; | |
| - ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &config); | |
| - if (ret < 0) { | |
| - NV_ERROR(drm, "Failure to read SCDC_TMDS_CONFIG: %d\n", ret); | |
| - return; | |
| - } | |
| - config &= ~(SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE); | |
| - config |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 * high_tmds_clock_ratio; | |
| - config |= SCDC_SCRAMBLING_ENABLE * scrambling; | |
| - ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, config); | |
| - if (ret < 0) | |
| - NV_ERROR(drm, "Failure to write SCDC_TMDS_CONFIG = 0x%02x: %d\n", | |
| - config, ret); | |
| } | |
| /****************************************************************************** |
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