Created
January 27, 2020 15:21
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cbmem for T440P
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coreboot-4.11-994-gd250063c09-dirty Fri Jan 24 09:53:14 UTC 2020 bootblock starting (log level: 5)... | |
FMAP: Found "FLASH" version 1.1 at 0xa50000. | |
FMAP: base = 0xff400000 size = 0xc00000 #areas = 5 | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/romstage' | |
CBFS: Found @ offset 80 size 5c24 | |
BS: bootblock times (exec / console): total (unknown) / 0 ms | |
coreboot-4.11-994-gd250063c09-dirty Fri Jan 24 09:53:14 UTC 2020 romstage starting (log level: 5)... | |
Disabling Watchdog reboot... done. | |
SMBus controller enabled | |
Setting up static northbridge registers... done. | |
Started PEG10 link training. | |
Temporarily hiding PEG10. | |
Started PEG10 link training. | |
Temporarily hiding PEG10. | |
Initializing IGD... | |
Back from haswell_early_initialization() | |
CPU id(306c3) ucode:00000027 Intel(R) Core(TM) i5-4300M CPU @ 2.60GHz | |
AES supported, TXT supported, VT supported | |
PCH type: QM87, device id: 8c4f, rev id 5 | |
Starting UEFI PEI System Agent | |
FMAP: area RW_MRC_CACHE found @ a00000 (65536 bytes) | |
prepare_mrc_cache: at 0xffe00030, size fd4 | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'mrc.bin' | |
CBFS: Found @ offset 14fdc0 size 2e6e4 | |
System Agent: Starting up... | |
System Agent: Initializing PCH | |
install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845} | |
install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276} | |
System Agent: Initializing PCH (SMBUS) | |
System Agent: Initializing PCH (USB) | |
System Agent: Initializing PCH (SA Init) | |
System Agent: Initializing PCH (Me UMA) | |
System Agent: Initializing Memory | |
System Agent: Done. | |
Sanity checking heap. | |
System Agent Version 1.6.1 Build 2 | |
memcfg DDR3 clock 1600 MHz | |
memcfg channel assignment: A: 0, B 1, C 2 | |
memcfg channel[0] config (00680008): | |
ECC inactive | |
enhanced interleave mode on | |
rank interleave on | |
DIMMA 2048 MB width x16 single rank, selected | |
DIMMB 0 MB width x8 or x32 single rank | |
memcfg channel[1] config (00600000): | |
ECC inactive | |
enhanced interleave mode on | |
rank interleave on | |
DIMMA 0 MB width x8 or x32 single rank, selected | |
DIMMB 0 MB width x8 or x32 single rank | |
CBMEM: | |
IMD: root @ 0x7cfff000 254 entries. | |
IMD: root @ 0x7cffec00 62 entries. | |
Unhiding PEG10. | |
SMM Memory Map | |
SMRAM : 0x7d000000 0x800000 | |
Subregion 0: 0x7d000000 0x300000 | |
Subregion 1: 0x7d300000 0x100000 | |
Subregion 2: 0x7d400000 0x400000 | |
MTRR Range: Start=7c800000 End=7d000000 (Size 800000) | |
MTRR Range: Start=7d000000 End=7d800000 (Size 800000) | |
MTRR Range: Start=ff800000 End=0 (Size 800000) | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/postcar' | |
CBFS: Found @ offset 4b440 size 4150 | |
Decompressing stage fallback/postcar @ 0x7cfd1fc0 (33296 bytes) | |
Loading module at 0x7cfd2000 with entry 0x7cfd2000. filesize: 0x3ed0 memsize: 0x81d0 | |
Processing 137 relocs. Offset value of 0x7afd2000 | |
BS: romstage times (exec / console): total (unknown) / 1 ms | |
coreboot-4.11-994-gd250063c09-dirty Fri Jan 24 09:53:14 UTC 2020 postcar starting (log level: 7)... | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/ramstage' | |
CBFS: Found @ offset 10dc0 size 1ac15 | |
Decompressing stage fallback/ramstage @ 0x7cf85fc0 (306264 bytes) | |
Loading module at 0x7cf86000 with entry 0x7cf86000. filesize: 0x35c58 memsize: 0x4ac18 | |
Processing 3730 relocs. Offset value of 0x7c186000 | |
BS: postcar times (exec / console): total (unknown) / 0 ms | |
coreboot-4.11-994-gd250063c09-dirty Fri Jan 24 09:53:14 UTC 2020 ramstage starting (log level: 7)... | |
Normal boot. | |
Enumerating buses... | |
Root Device scanning... | |
CPU_CLUSTER: 0 enabled | |
DOMAIN: 0000 enabled | |
DOMAIN: 0000 scanning... | |
PCI: pci_scan_bus for bus 00 | |
PCI: 00:00.0 [8086/0c04] enabled | |
PCI: 00:01.0 subordinate bus PCI Express | |
PCI: 00:01.0 [8086/0c01] enabled | |
PCI: 00:02.0 [8086/0416] enabled | |
PCI: 00:03.0 [8086/0c0c] enabled | |
PCI: 00:04.0 [8086/0c03] enabled | |
PCI: 00:14.0 [8086/8c31] enabled | |
PCI: 00:16.0 [8086/8c3a] enabled | |
PCI: 00:16.1: Disabling device | |
PCI: 00:16.2: Disabling device | |
PCI: 00:16.3: Disabling device | |
PCI: 00:19.0 [8086/153a] enabled | |
PCI: 00:1a.0 [8086/8c2d] enabled | |
PCI: 00:1b.0 [8086/8c20] enabled | |
PCIe Root Port 1 ASPM is disabled | |
PCI: 00:1c.0 [8086/8c10] enabled | |
PCIe Root Port 2 ASPM is disabled | |
PCI: 00:1c.1 [8086/8c12] enabled | |
PCI: 00:1c.2 [8086/8c14] disabled | |
PCI: 00:1c.3 [8086/8c16] disabled | |
PCI: 00:1c.4 [8086/8c18] disabled | |
PCI: 00:1d.0 [8086/8c26] enabled | |
PCI: 00:1f.0 [8086/8c4f] enabled | |
PCI: 00:1f.2 [8086/8c03] enabled | |
PCI: 00:1f.3 [8086/8c22] enabled | |
PCI: 00:1f.5: Disabling device | |
PCI: 00:1f.6: Disabling device | |
PCI: Leftover static devices: | |
PCI: 00:16.1 | |
PCI: 00:16.2 | |
PCI: 00:16.3 | |
PCI: 00:1c.5 | |
PCI: 00:1c.6 | |
PCI: 00:1c.7 | |
PCI: 00:1f.5 | |
PCI: 00:1f.6 | |
PCI: Check your devicetree.cb. | |
PCI: 00:01.0 scanning... | |
PCI: pci_scan_bus for bus 01 | |
scan_bus: bus PCI: 00:01.0 finished in 0 msecs | |
PCI: 00:1c.0 scanning... | |
PCI: pci_scan_bus for bus 02 | |
PCI: 02:00.0 [10ec/5227] enabled | |
Enabling Common Clock Configuration | |
ASPM: Enabled L0s and L1 | |
PCIe: Max_Payload_Size adjusted to 128 | |
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs | |
PCI: 00:1c.1 scanning... | |
PCI: pci_scan_bus for bus 03 | |
PCI: 03:00.0 [8086/08b2] enabled | |
Enabling Common Clock Configuration | |
ASPM: Enabled L1 | |
PCIe: Max_Payload_Size adjusted to 128 | |
scan_bus: bus PCI: 00:1c.1 finished in 0 msecs | |
PCI: 00:1f.0 scanning... | |
No CMOS option 'touchpad'. | |
PMH7: ID 05 Revision 01 | |
PNP: 00ff.1 enabled | |
H8: EC Firmware ID GLHT25WW-3.23, Version 8.01A | |
No CMOS option 'bluetooth'. | |
H8: WWAN detection not implemented. Assuming WWAN installed | |
No CMOS option 'wwan'. | |
PNP: 00ff.2 enabled | |
PNP: 0c31.0 enabled | |
scan_bus: bus PCI: 00:1f.0 finished in 4 msecs | |
PCI: 00:1f.3 scanning... | |
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs | |
scan_bus: bus DOMAIN: 0000 finished in 5 msecs | |
scan_bus: bus Root Device finished in 5 msecs | |
done | |
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms | |
FMAP: area RW_MRC_CACHE found @ a00000 (65536 bytes) | |
MRC: Checking cached data update for 'RW_MRC_CACHE'. | |
flash size 0x2800000 bytes | |
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0x2800000 | |
SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!! | |
found VGA at PCI: 00:02.0 | |
Setting up VGA for PCI: 00:02.0 | |
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 | |
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device | |
Allocating resources... | |
Reading resources... | |
mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff. | |
mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. | |
mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff. | |
mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff. | |
mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff. | |
MC MAP: TOM: 0x80000000 | |
MC MAP: TOUUD: 0x100600000 | |
MC MAP: MESEG_BASE: 0x7ffff00000 | |
MC MAP: MESEG_LIMIT: 0xfffff | |
MC MAP: REMAP_BASE: 0x100000000 | |
MC MAP: REMAP_LIMIT: 0x1005fffff | |
MC MAP: TOLUD: 0x7fa00000 | |
MC MAP: BGSM: 0x7d800000 | |
MC MAP: BDSM: 0x7da00000 | |
MC MAP: TESGMB: 0x7d000000 | |
MC MAP: GGC: 0x209 | |
PNP: 00ff.1 missing read_resources | |
PNP: 00ff.2 missing read_resources | |
Done reading resources. | |
skipping PNP: 00ff.2@60 fixed resource, size=0! | |
skipping PNP: 00ff.2@62 fixed resource, size=0! | |
skipping PNP: 00ff.2@64 fixed resource, size=0! | |
skipping PNP: 00ff.2@66 fixed resource, size=0! | |
Setting resources... | |
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io | |
PCI: 00:01.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem | |
PCI: 00:01.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem | |
PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64 | |
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 | |
PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io | |
PCI: 00:03.0 10 <- [0x00e0638000 - 0x00e063bfff] size 0x00004000 gran 0x0e mem64 | |
PCI: 00:04.0 10 <- [0x00e0630000 - 0x00e0637fff] size 0x00008000 gran 0x0f mem64 | |
PCI: 00:14.0 10 <- [0x00e0620000 - 0x00e062ffff] size 0x00010000 gran 0x10 mem64 | |
PCI: 00:16.0 10 <- [0x00e0645000 - 0x00e064500f] size 0x00000010 gran 0x04 mem64 | |
PCI: 00:19.0 10 <- [0x00e0600000 - 0x00e061ffff] size 0x00020000 gran 0x11 mem | |
PCI: 00:19.0 14 <- [0x00e0640000 - 0x00e0640fff] size 0x00001000 gran 0x0c mem | |
PCI: 00:19.0 18 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io | |
PCI: 00:1a.0 10 <- [0x00e0642000 - 0x00e06423ff] size 0x00000400 gran 0x0a mem | |
PCI: 00:1b.0 10 <- [0x00e063c000 - 0x00e063ffff] size 0x00004000 gran 0x0e mem64 | |
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io | |
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem | |
PCI: 00:1c.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 02 mem | |
PCI: 02:00.0 10 <- [0x00e0400000 - 0x00e0400fff] size 0x00001000 gran 0x0c mem | |
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io | |
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem | |
PCI: 00:1c.1 20 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 03 mem | |
PCI: 03:00.0 10 <- [0x00e0500000 - 0x00e0501fff] size 0x00002000 gran 0x0d mem64 | |
PCI: 00:1d.0 10 <- [0x00e0643000 - 0x00e06433ff] size 0x00000400 gran 0x0a mem | |
PNP: 00ff.1 missing set_resources | |
PNP: 00ff.2 missing set_resources | |
PCI: 00:1f.2 10 <- [0x0000001880 - 0x0000001887] size 0x00000008 gran 0x03 io | |
PCI: 00:1f.2 14 <- [0x0000001890 - 0x0000001893] size 0x00000004 gran 0x02 io | |
PCI: 00:1f.2 18 <- [0x0000001888 - 0x000000188f] size 0x00000008 gran 0x03 io | |
PCI: 00:1f.2 1c <- [0x0000001894 - 0x0000001897] size 0x00000004 gran 0x02 io | |
PCI: 00:1f.2 20 <- [0x0000001860 - 0x000000187f] size 0x00000020 gran 0x05 io | |
PCI: 00:1f.2 24 <- [0x00e0641000 - 0x00e06417ff] size 0x00000800 gran 0x0b mem | |
PCI: 00:1f.3 10 <- [0x00e0644000 - 0x00e06440ff] size 0x00000100 gran 0x08 mem64 | |
Done setting resources. | |
Done allocating resources. | |
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms | |
Enabling resources... | |
PCI: 00:00.0 subsystem <- 17aa/220e | |
PCI: 00:00.0 cmd <- 06 | |
PCI: 00:01.0 bridge ctrl <- 0013 | |
PCI: 00:01.0 cmd <- 00 | |
PCI: 00:02.0 subsystem <- 17aa/220e | |
PCI: 00:02.0 cmd <- 03 | |
PCI: 00:03.0 subsystem <- 17aa/220e | |
PCI: 00:03.0 cmd <- 02 | |
PCI: 00:04.0 cmd <- 02 | |
PCI: 00:14.0 subsystem <- 17aa/220e | |
PCI: 00:14.0 cmd <- 102 | |
PCI: 00:16.0 subsystem <- 17aa/220e | |
PCI: 00:16.0 cmd <- 02 | |
PCI: 00:19.0 subsystem <- 17aa/220e | |
PCI: 00:19.0 cmd <- 103 | |
PCI: 00:1a.0 subsystem <- 17aa/220e | |
PCI: 00:1a.0 cmd <- 102 | |
PCI: 00:1b.0 subsystem <- 17aa/220e | |
PCI: 00:1b.0 cmd <- 102 | |
PCI: 00:1c.0 bridge ctrl <- 0013 | |
PCI: 00:1c.0 subsystem <- 17aa/220e | |
PCI: 00:1c.0 cmd <- 06 | |
PCI: 00:1c.1 bridge ctrl <- 0013 | |
PCI: 00:1c.1 subsystem <- 17aa/220e | |
PCI: 00:1c.1 cmd <- 06 | |
PCI: 00:1d.0 subsystem <- 17aa/220e | |
PCI: 00:1d.0 cmd <- 102 | |
PCI: 00:1f.0 subsystem <- 17aa/220e | |
PCI: 00:1f.0 cmd <- 107 | |
PCI: 00:1f.2 subsystem <- 17aa/220e | |
PCI: 00:1f.2 cmd <- 103 | |
PCI: 00:1f.3 subsystem <- 17aa/220e | |
PCI: 00:1f.3 cmd <- 103 | |
PCI: 02:00.0 cmd <- 02 | |
PCI: 03:00.0 cmd <- 02 | |
done. | |
Found TPM ST33ZP24 by ST Microelectronics | |
TPM: Startup | |
TPM: command 0x99 returned 0x0 | |
TPM: Asserting physical presence | |
TPM: command 0x4000000a returned 0x0 | |
TPM: command 0x65 returned 0x0 | |
TPM: flags disable=0, deactivated=0, nvlocked=1 | |
TPM: setup succeeded | |
BS: BS_DEV_INIT entry times (exec / console): 61 / 0 ms | |
Initializing devices... | |
Root Device init | |
Root Device init finished in 0 msecs | |
CPU_CLUSTER: 0 init | |
MTRR: Physical address space: | |
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 | |
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 | |
0x00000000000c0000 - 0x000000007d800000 size 0x7d740000 type 6 | |
0x000000007d800000 - 0x00000000d0000000 size 0x52800000 type 0 | |
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 | |
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 | |
0x0000000100000000 - 0x0000000100600000 size 0x00600000 type 6 | |
MTRR: Fixed MSR 0x250 0x0606060606060606 | |
MTRR: Fixed MSR 0x258 0x0606060606060606 | |
MTRR: Fixed MSR 0x259 0x0000000000000000 | |
MTRR: Fixed MSR 0x268 0x0606060606060606 | |
MTRR: Fixed MSR 0x269 0x0606060606060606 | |
MTRR: Fixed MSR 0x26a 0x0606060606060606 | |
MTRR: Fixed MSR 0x26b 0x0606060606060606 | |
MTRR: Fixed MSR 0x26c 0x0606060606060606 | |
MTRR: Fixed MSR 0x26d 0x0606060606060606 | |
MTRR: Fixed MSR 0x26e 0x0606060606060606 | |
MTRR: Fixed MSR 0x26f 0x0606060606060606 | |
CPU physical address size: 39 bits | |
MTRR: default type WB/UC MTRR counts: 6/5. | |
MTRR: UC selected as default type. | |
MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 | |
MTRR: 1 base 0x000000007d800000 mask 0x0000007fff800000 type 0 | |
MTRR: 2 base 0x000000007e000000 mask 0x0000007ffe000000 type 0 | |
MTRR: 3 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1 | |
MTRR: 4 base 0x0000000100000000 mask 0x0000007fff800000 type 6 | |
MTRR check | |
Fixed MTRRs : Enabled | |
Variable MTRRs: Enabled | |
Initializing VR config. | |
CPU has 2 cores, 4 threads enabled. | |
Setting up SMI for CPU | |
Will perform SMM setup. | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'cpu_microcode_blob.bin' | |
CBFS: Found @ offset 5d40 size b000 | |
microcode: sig=0x306c3 pf=0x10 revision=0x27 | |
CPU: Intel(R) Core(TM) i5-4300M CPU @ 2.60GHz. | |
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 | |
Processing 16 relocs. Offset value of 0x00030000 | |
Attempting to start 3 APs | |
Waiting for 10ms after sending INIT. | |
Waiting for 1st SIPI to complete...done. | |
Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. | |
done. | |
AP: slot 2 apic_id 2. | |
AP: slot 3 apic_id 3. | |
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a8 memsize: 0x1a8 | |
Processing 13 relocs. Offset value of 0x00038000 | |
SMM Module: stub loaded at 0x00038000. Will call 0x7cfa4276(0x00000000) | |
Installing SMM handler to 0x7d000000 | |
Loading module at 0x7d010000 with entry 0x7d0105b4. filesize: 0x1ed0 memsize: 0x5f78 | |
Processing 114 relocs. Offset value of 0x7d010000 | |
Loading module at 0x7d008000 with entry 0x7d008000. filesize: 0x1a8 memsize: 0x1a8 | |
Processing 13 relocs. Offset value of 0x7d008000 | |
SMM Module: placing jmp sequence at 0x7d007c00 rel16 0x03fd | |
SMM Module: placing jmp sequence at 0x7d007800 rel16 0x07fd | |
SMM Module: placing jmp sequence at 0x7d007400 rel16 0x0bfd | |
SMM Module: stub loaded at 0x7d008000. Will call 0x7d0105b4(0x00000000) | |
Initializing Southbridge SMI... | |
SMI_STS: MCSMI | |
New SMBASE 0x7d000000 | |
In relocation handler: cpu 0 | |
New SMBASE=0x7d000000 IEDBASE=0x7d400000 | |
Writing SMRR. base = 0x7d000006, mask=0xff800800 | |
Relocation complete. | |
microcode: Update skipped, already up-to-date | |
New SMBASE 0x7cfffc00 | |
In relocation handler: cpu 1 | |
New SMBASE=0x7cfffc00 IEDBASE=0x7d400000 | |
Writing SMRR. base = 0x7d000006, mask=0xff800800 | |
Relocation complete. | |
microcode: Update skipped, already up-to-date | |
New SMBASE 0x7cfff800 | |
In relocation handler: cpu 2 | |
New SMBASE=0x7cfff800 IEDBASE=0x7d400000 | |
Writing SMRR. base = 0x7d000006, mask=0xff800800 | |
Relocation complete. | |
microcode: Update skipped, already up-to-date | |
New SMBASE 0x7cfff400 | |
In relocation handler: cpu 3 | |
New SMBASE=0x7cfff400 IEDBASE=0x7d400000 | |
Writing SMRR. base = 0x7d000006, mask=0xff800800 | |
Relocation complete. | |
microcode: Update skipped, already up-to-date | |
Initializing CPU #0 | |
CPU: vendor Intel device 306c3 | |
CPU: family 06, model 3c, stepping 03 | |
Setting up local APIC... | |
apic_id: 0x00 done. | |
IA32_FEATURE_CONTROL already locked; VMX status: enabled | |
IA32_FEATURE_CONTROL already locked | |
haswell: energy policy set to 6 | |
haswell: frequency set to 2600 | |
Turbo is available but hidden | |
Turbo is available and visible | |
CPU #0 initialized | |
Initializing CPU #1 | |
Initializing CPU #3 | |
Initializing CPU #2 | |
CPU: vendor Intel device 306c3 | |
CPU: family 06, model 3c, stepping 03 | |
CPU: vendor Intel device 306c3 | |
CPU: family 06, model 3c, stepping 03 | |
CPU: vendor Intel device 306c3 | |
CPU: family 06, model 3c, stepping 03 | |
Setting up local APIC... | |
Setting up local APIC... | |
apic_id: 0x03 Setting up local APIC... | |
apic_id: 0x02 done. | |
done. | |
IA32_FEATURE_CONTROL already locked; IA32_FEATURE_CONTROL already locked; apic_id: 0x01 done. | |
VMX status: enabled | |
VMX status: enabled | |
IA32_FEATURE_CONTROL already locked | |
IA32_FEATURE_CONTROL already locked | |
IA32_FEATURE_CONTROL already locked; VMX status: enabled | |
IA32_FEATURE_CONTROL already locked | |
haswell: energy policy set to 6 | |
haswell: energy policy set to 6 | |
haswell: energy policy set to 6 | |
haswell: frequency set to 2600 | |
CPU #2 initialized | |
haswell: frequency set to 2600 | |
CPU #1 initialized | |
haswell: frequency set to 2600 | |
CPU #3 initialized | |
bsp_do_flight_plan done after 1 msecs. | |
Enabling SMIs. | |
Locking SMM. | |
CPU_CLUSTER: 0 init finished in 15 msecs | |
PCI: 00:00.0 init | |
Disabling PEG12. | |
Disabling PEG11. | |
Disabling "device 7". | |
Set BIOS_RESET_CPL | |
CPU TDP: 37 Watts | |
PCI: 00:00.0 init finished in 1 msecs | |
PCI: 00:02.0 init | |
GT Power Management Init | |
GT Power Management Init (post VBIOS) | |
PCI: 00:02.0 init finished in 207 msecs | |
PCI: 00:03.0 init | |
Mini-HD: base = 0xe0638000 | |
HDA: No codec! | |
PCI: 00:03.0 init finished in 51 msecs | |
PCI: 00:04.0 init | |
PCI: 00:04.0 init finished in 0 msecs | |
PCI: 00:14.0 init | |
IOBP: set 0xe5004001 to 0x000000ce | |
PCI: 00:14.0 init finished in 0 msecs | |
PCI: 00:16.0 init | |
intel_me_path: mbp is not ready! | |
ME: BIOS path: Error | |
ME: MBP not ready | |
PCI: 00:16.0 init finished in 0 msecs | |
PCI: 00:19.0 init | |
PCI: 00:19.0 init finished in 0 msecs | |
PCI: 00:1a.0 init | |
EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce | |
done. | |
PCI: 00:1a.0 init finished in 0 msecs | |
PCI: 00:1b.0 init | |
Azalia: base = 0xe063c000 | |
Azalia: codec_mask = 01 | |
HDA: Initializing codec #0 | |
HDA: codec viddid: 10ec0292 | |
HDA: verb loaded. | |
PCI: 00:1b.0 init finished in 3 msecs | |
PCI: 00:1c.0 init | |
Initializing PCH PCIe bridge. | |
PCI: 00:1c.0 init finished in 0 msecs | |
PCI: 00:1c.1 init | |
Initializing PCH PCIe bridge. | |
PCI: 00:1c.1 init finished in 0 msecs | |
PCI: 00:1d.0 init | |
EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce | |
done. | |
PCI: 00:1d.0 init finished in 0 msecs | |
PCI: 00:1f.0 init | |
pch: lpc_init | |
IOAPIC: Initializing IOAPIC at 0xfec00000 | |
IOAPIC: Bootstrap Processor Local APIC = 0x00 | |
IOAPIC: ID = 0x02 | |
Set power off after power failure. | |
NMI sources enabled. | |
LynxPoint PM init | |
RTC: failed = 0x0 | |
RTC Init | |
Disabling ACPI via APMC: | |
done. | |
PCI: 00:1f.0 init finished in 0 msecs | |
PCI: 00:1f.2 init | |
SATA: Initializing... | |
SATA: Controller in AHCI mode. | |
ABAR: 0xe0641000 | |
PCI: 00:1f.2 init finished in 0 msecs | |
PCI: 00:1f.3 init | |
PCI: 00:1f.3 init finished in 0 msecs | |
PCI: 02:00.0 init | |
PCI: 02:00.0 init finished in 0 msecs | |
PCI: 03:00.0 init | |
PCI: 03:00.0 init finished in 0 msecs | |
PNP: 00ff.2 init | |
PNP: 00ff.2 init finished in 0 msecs | |
Devices initialized | |
BS: BS_DEV_INIT run times (exec / console): 279 / 0 ms | |
Finalize devices... | |
PCI: 00:1f.0 final | |
Devices finalized | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/dsdt.aml' | |
CBFS: Found @ offset 4f600 size 36b9 | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/slic' | |
CBFS: 'fallback/slic' not found. | |
ACPI: Writing ACPI tables at 7cf48000. | |
ACPI: * FACS | |
ACPI: * DSDT | |
ACPI: * FADT | |
ACPI: added table 1/32, length now 40 | |
ACPI: * SSDT | |
Found 1 CPU(s) with 4 core(s) each. | |
PSS: 2601MHz power 37000 control 0x2100 status 0x2100 | |
PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00 | |
PSS: 2000MHz power 26518 control 0x1400 status 0x1400 | |
PSS: 1600MHz power 20229 control 0x1000 status 0x1000 | |
PSS: 1200MHz power 14447 control 0xc00 status 0xc00 | |
PSS: 800MHz power 9143 control 0x800 status 0x800 | |
PSS: 2601MHz power 37000 control 0x2100 status 0x2100 | |
PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00 | |
PSS: 2000MHz power 26518 control 0x1400 status 0x1400 | |
PSS: 1600MHz power 20229 control 0x1000 status 0x1000 | |
PSS: 1200MHz power 14447 control 0xc00 status 0xc00 | |
PSS: 800MHz power 9143 control 0x800 status 0x800 | |
PSS: 2601MHz power 37000 control 0x2100 status 0x2100 | |
PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00 | |
PSS: 2000MHz power 26518 control 0x1400 status 0x1400 | |
PSS: 1600MHz power 20229 control 0x1000 status 0x1000 | |
PSS: 1200MHz power 14447 control 0xc00 status 0xc00 | |
PSS: 800MHz power 9143 control 0x800 status 0x800 | |
PSS: 2601MHz power 37000 control 0x2100 status 0x2100 | |
PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00 | |
PSS: 2000MHz power 26518 control 0x1400 status 0x1400 | |
PSS: 1600MHz power 20229 control 0x1000 status 0x1000 | |
PSS: 1200MHz power 14447 control 0xc00 status 0xc00 | |
PSS: 800MHz power 9143 control 0x800 status 0x800 | |
Generating ACPI PIRQ entries | |
ACPI: * H8 | |
H8: BDC detection not implemented. Assuming BDC installed | |
H8: WWAN detection not implemented. Assuming WWAN installed | |
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 | |
ACPI: added table 2/32, length now 44 | |
ACPI: * MCFG | |
ACPI: added table 3/32, length now 48 | |
ACPI: * TCPA | |
TCPA log created at 0x7cf38000 | |
ACPI: added table 4/32, length now 52 | |
ACPI: * MADT | |
ACPI: added table 5/32, length now 56 | |
current = 7cf4d550 | |
ACPI: * DMAR | |
ACPI: added table 6/32, length now 60 | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'vbt.bin' | |
CBFS: Found @ offset 2c300 size 598 | |
Found a VBT of 4608 bytes after decompression | |
GMA: Found VBT in CBFS | |
GMA: Found valid VBT in CBFS | |
ACPI: * HPET | |
ACPI: added table 7/32, length now 64 | |
ACPI: * SSDT2 | |
ACPI: added table 8/32, length now 68 | |
current = 7cf4f690 | |
ACPI: done. | |
ACPI tables: 30352 bytes. | |
smbios_write_tables: 7cf37000 | |
Create SMBIOS type 17 | |
PCI: 03:00.0 (unknown) | |
SMBIOS tables: 805 bytes. | |
Writing table forward entry at 0x00000500 | |
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum c2e7 | |
Writing coreboot table at 0x7cf6c000 | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'cmos_layout.bin' | |
CBFS: Found @ offset 2c900 size 5f0 | |
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES | |
1. 0000000000001000-000000000009ffff: RAM | |
2. 00000000000a0000-00000000000fffff: RESERVED | |
3. 0000000000100000-000000007cf36fff: RAM | |
4. 000000007cf37000-000000007cf85fff: CONFIGURATION TABLES | |
5. 000000007cf86000-000000007cfd0fff: RAMSTAGE | |
6. 000000007cfd1000-000000007cffffff: CONFIGURATION TABLES | |
7. 000000007d000000-000000007f9fffff: RESERVED | |
8. 00000000f0000000-00000000f3ffffff: RESERVED | |
9. 00000000fed10000-00000000fed19fff: RESERVED | |
10. 00000000fed40000-00000000fed44fff: RESERVED | |
11. 00000000fed84000-00000000fed84fff: RESERVED | |
12. 00000000fed90000-00000000fed91fff: RESERVED | |
13. 0000000100000000-00000001005fffff: RAM | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
Wrote coreboot table at: 0x7cf6c000, 0x9c4 bytes, checksum 9ca2 | |
coreboot table: 2524 bytes. | |
IMD ROOT 0. 0x7cfff000 0x00001000 | |
IMD SMALL 1. 0x7cffe000 0x00001000 | |
CONSOLE 2. 0x7cfde000 0x00020000 | |
TIME STAMP 3. 0x7cfdd000 0x00000910 | |
MRC DATA 4. 0x7cfdc000 0x00000fe4 | |
ROMSTG STCK 5. 0x7cfdb000 0x00001000 | |
AFTER CAR 6. 0x7cfd1000 0x0000a000 | |
RAMSTAGE 7. 0x7cf85000 0x0004c000 | |
ACPI GNVS 8. 0x7cf84000 0x00001000 | |
SMM BACKUP 9. 0x7cf74000 0x00010000 | |
COREBOOT 10. 0x7cf6c000 0x00008000 | |
ACPI 11. 0x7cf48000 0x00024000 | |
TCPA TCGLOG12. 0x7cf38000 0x00010000 | |
SMBIOS 13. 0x7cf37000 0x00000800 | |
IMD small region: | |
IMD ROOT 0. 0x7cffec00 0x00000400 | |
FMAP 1. 0x7cffeae0 0x0000010a | |
MEM INFO 2. 0x7cffe920 0x000001b9 | |
ROMSTAGE 3. 0x7cffe900 0x00000004 | |
BS: BS_WRITE_TABLES run times (exec / console): 5 / 0 ms | |
FMAP: area COREBOOT found @ a50200 (1768960 bytes) | |
CBFS: Locating 'fallback/payload' | |
CBFS: Found @ offset 52d40 size af5f0 | |
Checking segment from ROM address 0xffea2f78 | |
Checking segment from ROM address 0xffea2f94 | |
Loading segment from ROM address 0xffea2f78 | |
code (compression=1) | |
New segment dstaddr 0x00800000 memsize 0x410000 srcaddr 0xffea2fb0 filesize 0xaf5b8 | |
Loading Segment: addr: 0x00800000 memsz: 0x0000000000410000 filesz: 0x00000000000af5b8 | |
using LZMA | |
Loading segment from ROM address 0xffea2f94 | |
Entry Point 0x008008f0 | |
BS: BS_PAYLOAD_LOAD run times (exec / console): 232 / 0 ms | |
ICH-NM10-PCH: watchdog disabled | |
Jumping to boot code at 0x008008f0(0x7cf6c000) |
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