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UUUUUUIS | |
URS | |
NPK | |
RBS | |
ddr init start!!! | |
ddr target freq:1866 MHz | |
ddr init pass!!! |
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load("//build/bazel_common_rules/dist:dist.bzl", "copy_to_dist_dir") | |
load("//build/kernel/kleaf:kernel.bzl", "kernel_build", "kernel_images", "kernel_modules_install") | |
load("//common:modules.bzl", "get_gki_modules_list") | |
load("//build/kernel/kleaf:common_kernels.bzl", "define_common_kernels") | |
_RGXX3_MODULE_OUTS = [ | |
"sound/soc/generic/snd-soc-simple-card-utils.ko", | |
"drivers/input/misc/pwm-vibra.ko", | |
"drivers/gpu/drm/panel/panel-newvision-nv3051d.ko", | |
"drivers/char/hw_random/optee-rng.ko", |
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--- SUNXI_DRAM_COM_BASE_BSP 2024-03-13 16:13:03.269292635 -0500 | |
+++ SUNXI_DRAM_COM_BASE_MAIN 2024-03-13 16:19:14.279221980 -0500 | |
@@ -53,10 +53,10 @@ | |
047fa340: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa350: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa360: 0d 06 00 08 00 03 00 02 04 00 00 00 00 00 00 00 | |
-047fa370: 09 00 00 01 80 00 64 00 04 00 00 00 00 00 00 00 | |
+047fa370: 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 00 | |
047fa380: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa390: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
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047fa000: 00 00 00 80 f4 09 00 00 00 ff 40 0e 8f 01 00 00 | |
047fa010: 10 00 00 00 40 30 10 00 00 00 00 00 00 00 00 00 | |
047fa020: ff ff ff ff ff 07 00 00 ff ff 00 00 00 00 00 00 | |
047fa030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa050: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
047fa090: 00 00 00 00 00 00 00 00 00 00 00 00 02 00 ff ff |
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047fa000: 00 00 00 80 f4 09 00 00 00 ff 40 0e 8f 01 00 00 ..........@..... | |
047fa010: 10 00 00 00 40 30 10 00 00 00 00 00 00 00 00 00 ....@0.......... | |
047fa020: ff ff ff ff ff 07 00 00 ff ff 00 00 00 00 00 00 ................ | |
047fa030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa050: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ | |
047fa090: 00 00 00 00 00 00 00 00 00 00 00 00 02 00 ff ff ................ |
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@ 0: boot0: Allwinner boot0 | |
size: 65536 bytes | |
eGON checksum matches: 0x311cf4a7 | |
DRAM parameters: A64 H616 | |
DRAM clock : 0x2a0 0x2a0 - | |
DRAM type : 0x8 0x8 - | |
ZQ value : 0x8080808 - - | |
ODT enabled : 0xe0e0e0e 0x7887bbbb - | |
DX ODT : - 0x8080808 - | |
DX DRI : - 0xe0e0e0e - |
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/dts-v1/; | |
/memreserve/ 0x0000000048000000 0x0000000001000000; | |
/ { | |
interrupt-parent = <0x01>; | |
#address-cells = <0x02>; | |
#size-cells = <0x02>; | |
model = "sun50iw9"; | |
compatible = "allwinner,h616\0arm,sun50iw9p1"; |
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From 97468eb5f2b18f29b046dc3f463d2841b9457d21 Mon Sep 17 00:00:00 2001 | |
From: Chris Morgan <[email protected]> | |
Date: Fri, 8 Dec 2023 10:10:25 -0600 | |
Subject: [PATCH] NOT YET READY TO MERGE | |
Changes required for Anbernic RG-ARC S and RG-ARC D. eMMC and touch | |
still need to be tested on the RG-ARC D. | |
--- | |
arch/arm64/boot/dts/rockchip/Makefile | 2 + | |
.../dts/rockchip/rk3566-anbernic-rg-arc-d.dts | 286 ++++++++++++++++++ |