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/** Determining when RVV 1.0 vfrev7.v SEW=32 result can not be converted | |
* exactly to a BF16 value. */ | |
#include <stdio.h> | |
#include <stdint.h> | |
#include <inttypes.h> | |
typedef union { | |
float f; | |
uint32_t u; |
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#include <stdio.h> | |
// How to build: | |
// riscv64-unknown-elf-gcc -march=rv64gcv_zvkned_zvksed_zvkg_zvknhb_zvksh_zvl128b vcrypto-lmul-alignment-test-case.c | |
// How to execute: | |
// spike --isa=rv64gcv_zvbc_zicntr_zihpm_zvkned_zvksed_zvkg_zvknhb_zvksh_zvl128b <pk-image> a.out | |
// This program aims at demonstrating that spike is flawed when | |
// it comes to executing vector crypto instructions with invalid register |
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# -*- coding: utf-8 -*- | |
# this script generates values for different 8-bit floating point formats | |
def bitMask(width): | |
""" generate a <width> wide bitmask """ | |
return 2**width - 1 | |
class FP8Fomat: | |
expBits = None # exponent field width (in bits) |
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// build with clang trunk | |
// clang -O2 -march=rv64gcv | |
// https://godbolt.org/z/ebPcGPbG1 | |
#include <stdio.h> | |
#include <stdint.h> | |
#include <inttypes.h> | |
#include <string.h> | |
#include <riscv_vector.h> | |