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@prydin
Created June 30, 2026 12:20
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R2R simulation
`timescale 1ns / 1ps
module sig_mag_cell(
input [3:0] in,
output [3:0] out,
input sign,
input cin,
output cout
);
assign out = sign ? ~in + cin: in + cin;
assign cout = out == 4'b0000 & cin;
endmodule
module sign_mag16(
input [15:0] in,
output [15:0] out,
input sign,
output cout
);
wire [3:0] in0 = in[3:0];
wire [3:0] in1 = in[7:4];
wire [3:0] in2 = in[11:8];
wire [3:0] in3 = in[15:12];
wire [3:0] out0;
wire [3:0] out1;
wire [3:0] out2;
wire [3:0] out3;
wire cout0;
wire cout1;
wire cout2;
wire cout3;
wire cin = 1;
sig_mag_cell cell0(in0, out0, sign, cin, cout0);
sig_mag_cell cell1(in1, out1, sign, cout0, cout1);
sig_mag_cell cell2(in2, out2, sign, cout1, cout2);
sig_mag_cell cell3(in3, out3, sign, cout2, cout3);
assign out = {out3, out2, out1, out0};
assign cout = cout3;
endmodule
module sign_mag_router(
input [15:0] in,
output [14:0] out_pos,
output [14:0] out_neg,
input sign
);
assign out_pos = sign ? 15'b0 : in[14:0];
assign out_neg = sign ? in[14:0] : 15'b0;
endmodule
module r2r;
reg [15:0] din;
reg sgn;
wire [15:0] dout;
wire cout;
integer i;
wire [14:0] out_pos;
wire [14:0] out_neg;
sign_mag16 sign_mag (din, dout, sgn, cout);
wire [14:0] magnitude = dout[14:0];
sign_mag_router router (dout, out_pos, out_neg, sgn);
initial begin
for (i = -32768; i < 32768 ; i = i + 1) begin
din = i & 16'h7fff;
sgn = (i >> 15) & 1;
#4;
$display("Set0 Input: %b, Sign: %b, Output: %b, Carry Out: %b, Out Pos: %b, Out Neg: %b", din, sgn, dout, cout, out_pos, out_neg);
end
end
endmodule
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