U-Boot 2013.07-H20250211a (Jun 09 2025 - 21:30:32)
apll_freq = 1200000000
mpll_freq = 840000000
vpll_freq = 1000000000
sdram init start
DDR clk rate 840000000
80000e5c 00000000 00000000
[root@Ingenic-uc1_1:~]# mount -t debugfs none /sys/kernel/debug; cat /sys/kernel
/debug/gpio
mount: mounting none on /sys/kernel/debug failed: Device or resource busy
GPIOs 0-31, platform/10010000.pinctrl, GPA:
gpio-0 ( |wifi_reset ) out hi
gpio-6 ( |wl_reg_on ) out hi
GPIOs 32-63, platform/10010000.pinctrl, GPB:
gpio-40 ( |Power ) in hi IRQ
U-Boot SPL 2013.07
Board info: T41NQ
apll_freq = 1104000000
mpll_freq = 1440000000
vpll_freq = 1188000000
sdram init start
DDR clk rate 720000000
DDRP_INNOPHY_PLL_CTRL: 00000028
| SoC | Kernel driver | VPU IP | Clock | Encode | Decode |
|---|---|---|---|---|---|
| T20 | soc_vpu + jz_nvpu |
NVPU (monolithic) | 333 MHz | H.264, JPEG | H.264, JPEG |
| T21 | soc_vpu + helix |
Helix (H.264+JPEG enc/dec) | 350 MHz | H.264, JPEG | H.264, JPEG |
| T23 | soc_vpu + helix (+IVDC) |
Helix (H.264+JPEG enc/dec) | 450 MHz | H.264, JPEG | H.264, JPEG |
| T30 | soc_vpu + helix + radix |
Helix (H.264+JPEG) + Radix (H.265) | 350 MHz | H.264, H.265, JPEG | H.264, H.265, JPEG |
| T32 | ingenic_vpu + helix + radix |
JPEG engine + Hera (unified H.264+H.265+JPEG) | 500 MHz | H.264, H.265, JPEG | H.264, H.265, JPEG |
|
root:EeA5H4cQvy0gc:19220:0:99999:7:::
decoded password: v4Ayp>52
[root@Ingenic-uc1_1:~]# cat /sys/kernel/debug/gpio
GPIOs 0-31, GPIO A:
gpio-10 (ADC_PIN ) in lo
gpio-20 (sc4336p_reset_1 ) out hi
-- buildroot --
-jX doesn't work as make arguments
cant delete parent folder due to chmod -R a-w $(BR2_EXTERNAL)/buildroot in makefile
running make is very slow, randomly, possibly not using jobserver
add build time to finalize screen at the end of the build?
update make edit, to work with the new config file format
buildroot sysupgrade forces remap, this should not be enforced, optional.
-- menuconfig --
image sensor qty should be a menu, with 1-4, not a text box
| Technical Parameters | T23 Series | T33 Series | T32Pro Series |
|---|---|---|---|
| CPU Architecture | Xburst® 1, MIPS32 ISA | Xburst® 1, MIPS32 ISA + SIMD128 instruction set | Xburst® 1, MIPS32 ISA + SIMD128 instruction set |
| CPU Clock Speed | 1.2 GHz ~ 1.4 GHz | 1.0 GHz | 1.2 GHz |
| Cache Configuration | 16K I-Cache + 16K D-Cache, 64KB L2 Cache | 32KB I-Cache + 32KB D-Cache, 128KB L2 Cache | 32KB I-Cache + 32KB D-Cache, 128KB L2 Cache |
| MCU Configuration | 600 MHz RISC-V coprocessor, supporting RV32IMC instruction set | 600 MHz RISC-V coprocessor, supporting RV32IMC instruction set | 600 MHz RISC-V coprocessor, supporting RV32IMC instruction set |
Here's how to flash your ESP32-C6 to work as an RCP (Radio Co-Processor) with Home Assistant's OpenThread Border Router add-on.
mkdir ~/esp-openthread && cd ~/esp-openthread
git clone -b v5.4.2 --recursive https://github.com/espressif/esp-idf.git
cd esp-idf
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| LG tv: | |
| Power | |
| 0000 006D 0022 0000 015B 00AE 0015 0016 0015 0017 0015 0041 0014 0017 0014 0017 0014 0017 0015 0016 0015 0016 0014 0043 0015 0041 0014 0017 0014 0042 0015 0042 0014 0041 0015 0041 0015 0041 0015 0016 0015 0016 0015 0016 0014 0043 0015 0016 0014 0017 0014 0017 0015 0016 0015 0042 0014 0043 0014 0043 0014 0017 0014 0043 0014 0041 0015 0042 0016 0041 0014 0180 | |
| Input | |
| 0000 006D 0022 0000 015B 00AC 0015 0017 0014 0016 0015 0043 0014 0017 0014 0017 0014 0016 0015 0017 0014 0017 0014 0043 0014 0043 0014 0016 0015 0043 0013 0042 0015 0041 0015 0041 0014 0043 0014 0043 0014 0043 0014 0017 0014 0043 0014 0017 0014 0016 0015 0017 0014 0016 0015 0017 0014 0017 0014 0041 0015 0016 0015 0041 0015 0041 0015 0041 0015 0041 0015 0180 0000 006D 0002 0000 015B 0009 0062 0180 | |
| Exit | |
| 0000 006D 0022 0000 015A 00AE 0015 0017 0014 0017 0014 0043 0014 0017 0014 0017 0014 0017 0014 0017 0014 0016 0015 0041 0015 0041 0015 0016 0014 0043 0014 0043 0014 0043 0015 0042 0014 0043 0013 0041 0015 0041 0015 0016 0015 0041 0014 |
[root@Ingenic-uc1_1:~]# cat /sys/kernel/debug/gpio
GPIOs 0-31, GPIO A:
gpio-6 (sysfs ) out hi
gpio-18 (sc2337p_reset ) out hi
GPIOs 32-63, GPIO B:
gpio-38 (gpioCtrl ) in hi
gpio-39 (gpioCtrl ) out hi
gpio-40 (gpioCtrl ) out lo
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