IR -> IR Optimization -> Code Generation(Register allocation/Instruction selection) Assembly
1.top-of-stack caching (1-TOSCA)
2.init garbage collector
1.similar to C++ inheritance
2.gc in COOL runtime
3.Class Tag, Object Size, Dispatch table pointer (similar to C++ vptr), Dispatch table (similar to C++ vtable)
4.register allocation is Graph coloring
(Linear-Scan Register Allocation
is another way to allocate registers)
1.Three-address code (it doesn't be implemented in this course)
1.it contains a concurrent garbage collector
2.the management of application memory
3.how the program accesses variables, mechanisms for passing parameters between procedures
4.interfacing with the operating system
5.The compiler makes assumptions depending on the specific runtime system to generate correct code.
gc is also part of the program
1.gc in runtime
2.how gc works
3.stack-based virtual machine -> register-based virtual machine (?
4.code generation
4-1. stack based machine
4-2. register based machine
-> register allocation and assignment
-> instruction selection/instruction scheduling
5. how to verify and test compiler?
mips vs arm (both are 32-bit)
MIPS Stack
stack frame layout
-------<- start of previous stack frame
------<- arguments for calling current stack,
func(a0, a1, a2, a3...)
$a3
$a2
$a1
$a0
------<-sp + (4n) // start of current stack frame, which is also end of previous stack frame
ra
------<-sp + (4n)-4
fp (for non-leaf function if necessary)
------<-sp + 4n
saved_registers($s.., save before calling next function/restore after returning from next function)
------<-
local variable ($t..)
------<-
arguments for calling another function ($a..)
------<-sp // end of current stack frame
push/pop stack frame