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@cr1901
cr1901 / top.v
Created February 4, 2017 21:44
YMSoC platform-independent Verilog
/* Machine-generated using Migen */
module top(
output audio_a0,
output audio_a1,
output user_led,
output user_led_1,
input clk32,
output serial_tx,
input serial_rx,
output user_led_2
@cr1901
cr1901 / reproduce.md
Last active January 8, 2017 06:36
Binutils Long Link Times Replication Procedure

LLVM config (some irrelevant options are missing).

CC=gcc CXX=g++ cmake $LLVM_DIR -G "Ninja" -DCMAKE_BUILD_TYPE=Debug -DLLVM_TARGETS_TO_BUILD="X86" -DCMAKE_INSTALL_PREFIX=$PREFIX

Binutils config

Built using the MINGW-packages repo: https://github.com/Alexpux/MINGW-packages/tree/master/mingw-w64-binutils, with additional CFLAGS options to enable profiling (CFLAGS=-pg), --with-libiconv=/mingw64, --with-sysroot=/mingw64, and --prefix=/opt/bindebug

  • The linker without these patches, and the only configure option being --prefix=/opt/bindebug is nonfunctional, bombing with obscure errors such as:
@cr1901
cr1901 / build.log
Created January 8, 2017 04:23
MSYS binutils Build Attempt
William@William-THINK MSYS ~/src/mingw-w64-binutils-PKGBUILD/src/build-x86_64-w64-mingw32$ make
make[1]: Entering directory '/home/William/src/mingw-w64-binutils-PKGBUILD/src/build-x86_64-w64-mingw32'
make[2]: Entering directory '/home/William/src/mingw-w64-binutils-PKGBUILD/src/build-x86_64-w64-mingw32/libiberty'
if [ x"" != x ]; then \
gcc -c -DHAVE_CONFIG_H -march=x86-64 -mtune=generic -O2 -pipe -ggdb -Og -pg -O0 -D__USE_MINGW_ACCESS -D_FORTIFY_SOURCE=2 -D__USE_MINGW_ANSI_STDIO=1 -I. -I../../binutils-2.27/libiberty/../include -W -Wall -Wwrite-strings -Wc++-compat -Wstrict-prototypes -pedantic -D_GNU_SOURCE ../../binutils-2.27/libiberty/pex-win32.c -o pic/pex-win32.o; \
else true; fi
if [ x"" != x ]; then \
gcc -c -DHAVE_CONFIG_H -march=x86-64 -mtune=generic -O2 -pipe -ggdb -Og -pg -O0 -D__USE_MINGW_ACCESS -D_FORTIFY_SOURCE=2 -D__USE_MINGW_ANSI_STDIO=1 -I. -I../../binutils-2.27/libiberty/../include -W -Wall -Wwrite-strings -Wc++-compat -Wstrict-prototypes -pedantic -D_GNU_SOURCE ../../binutils-2.
@cr1901
cr1901 / main.S
Last active December 24, 2016 13:22
LiteX Loop Test
00080f88 <main>:
80f88: 37 9c fe 90 addi sp,sp,-368
80f8c: 5b 8b 00 2c sw (sp+44),r11
80f90: 5b 8c 00 28 sw (sp+40),r12
80f94: 5b 8d 00 24 sw (sp+36),r13
80f98: 5b 8e 00 20 sw (sp+32),r14
80f9c: 5b 8f 00 1c sw (sp+28),r15
80fa0: 5b 90 00 18 sw (sp+24),r16
80fa4: 5b 91 00 14 sw (sp+20),r17
80fa8: 5b 92 00 10 sw (sp+16),r18
[1403/1971] Building CXX object tools/clang/lib/ASTMatchers/Dynamic/CMakeFiles/clangDynamicASTMatchers.dir/Registry.cpp.obj
...
FAILED: C:\msys64\mingw32\bin\g++.exe -DCLANG_ENABLE_ARCMT -DCLANG_ENABLE_OBJC_REWRITER -DCLANG_ENABLE_STATIC_ANALYZER -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Itools/clang/lib/ASTMatchers/Dynamic -IC:/msys64/home/William/src/llvm-or1k/tools/clang/lib/ASTMatchers/Dynamic -IC:/msys64/home/William/src/llvm-or1k/tools/clang/include -Itools/clang/include -Iinclude -IC:/msys64/home/William/src/llvm-or1k/include -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wdelete-non-virtual-dtor -Wno-comment -Werror=date-time -std=gnu++11 -fno-common -Woverloaded-virtual -fno-strict-aliasing -g -fno-exceptions -fno-rtti -MD -MT tools/clang/lib/ASTMatchers/Dynamic/CMakeFiles/clangDynamicASTMatchers.dir/Registry.cpp.obj -MF tools\clang
@cr1901
cr1901 / artiq.diff
Last active December 5, 2016 11:16
ARTIQ/MiSoC SPI fix
From cd2288c11835e55aa40f93329bfc4cfe26b29e30 Mon Sep 17 00:00:00 2001
From: "William D. Jones" <[email protected]>
Date: Mon, 5 Dec 2016 04:05:25 -0500
Subject: [PATCH 1/2] gateware/spi: Split done signal into latch_done,
shift_done.
---
artiq/gateware/spi.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
@cr1901
cr1901 / counter.v
Created November 23, 2016 19:58
yosys-tests
module counter_mod_n(
input clk,
input rst,
output[4:0] data
);
always @ (posedge clk) begin
if (reset) begin
@cr1901
cr1901 / dictionary.py
Created November 12, 2016 02:02
Mystery Source
"""
Uses the unofficial google dictionary API
Author:Sridarshan Shetty (India)
Twitter: http://twitter.com/sridarshan
Website: http://sridarshan.co.cc
"""
import urllib,ast,sys
def check(string):
return string.replace("&#39","'")
def main():
test.svg 21250 17250
@cr1901
cr1901 / fpganotes.md
Last active September 23, 2016 19:11
FPGA Board Notes

FPGABoardNotes

Power supplies

  • VCC- 1.2V
  • VCC_IO- 3.3V
  • VPP_2V5- 3.3V? (Icestick puts it to 3.0V)

Choosing an Interface

  • FT245 Pros/Cons
    • Pros
  • Cheaper