cfelton

from __future__ import division
from __future__ import print_function

from random import randint

from myhdl import *


class ADXL345(object):

cfelton

from myhdl import *

"""
This set of tests exercies a peculiar scenario where an
expanded interface is Signal is flagged as having multiple
drivers.  This appears to be a name collision in the name
expansion and was introduced in ....
"""

class Intf1(object):

cfelton

from random import randint
from myhdl import *

# output from the following tristate example
# Driver1  Driver2  Tristate  
#  None     None     None
#  None     1        1   
#  0        None     0   
#  None     1        1   

cfelton

def vhdl_stub(sigi, sigo):
    vhdl_stub.id = vhdl_stub.id + 1
    this_id = vhdl_stub.id
    @always_comb
    def assign():
        sigo.next = not sigi
    return assign
vhdl_stub.vhdl_code ="""
foo_bar_$this_id: entity work.blah(myhdl)
"""

cfelton

from __future__ import division
from __future__ import print_function

from myhdl import *

from zintf import IBus
from zintf import SPIBus
from spi_slave import SPISlave

cfelton

from __future__ import print_function
from __future__ import division

import os
from random import randint
from math import log
from pprint import pprint
from collections import OrderedDict
import pickle

cfelton

from random import randint
from myhdl import *

def pipe(xi, xo, clock, reset, N=8):

    buffer = [Signal(xi.val) for _ in range(N)]

    @always_seq(clock.posedge, reset=reset)
    def rtl():

cfelton

from __future__ import division
from __future__ import print_function

from myhdl import *

"""
This module contains two designs that implement bank permutations.  The
bank permutator takes an array input and maps to a differently ordered
array output.

cfelton

import myhdl
from myhdl import Signal
from myhdl import intbv
from myhdl import instance
from myhdl import always


def example_instance(clock, rx_bit_cnt, restart, tomax=111):

cfelton

from myhdl import *

instance_count = 0

def RAM_byte_enable_user(wdata, waddr, we, rdata, clk):
    """ RAM with byte enable writes
    """
    global instance_count
    assert len(wdata)/8 == len(we)